diff options
| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-04-20 20:54:07 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2011-04-20 20:54:07 +0000 |
| commit | 42fa7fe28b60b448f501e99ee285a0af12c86d34 (patch) | |
| tree | 247586f11a5be9dcbea2cbafaede92df058ac14b /src/mainboard/asus/a8v-e_deluxe | |
| parent | d8129f92c0cbd6a561195c1628ba3f9f98eccd50 (diff) | |
run uart_init() from console_init, just like the other console initialization functions.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asus/a8v-e_deluxe')
| -rw-r--r-- | src/mainboard/asus/a8v-e_deluxe/romstage.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c index 6785a2fca2..47a0e656f1 100644 --- a/src/mainboard/asus/a8v-e_deluxe/romstage.c +++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c @@ -159,11 +159,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sio_init(); w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); console_init(); enable_rom_decode(); - print_info("now booting... fallback\n"); + print_info("now booting... romstage\n"); /* Is this a CPU only reset? Or is this a secondary CPU? */ if (!cpu_init_detectedx && boot_cpu()) { @@ -174,7 +173,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sio_init(); w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); console_init(); enable_rom_decode(); |