diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-07 08:04:59 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-09 14:30:12 +0000 |
| commit | 600fa266bdc8740126420e63579a5b9d103ca960 (patch) | |
| tree | b824384794084eae2d4ebd7ff774cbc4bfb41999 /src/mainboard/asrock | |
| parent | 58955be0aab666dc40f7c0f9e31966cc605e2c12 (diff) | |
nb/intel/haswell: Hook up PCI domain and CPU cluster ops to devicetree
Change-Id: I955274bc6bda587201f130762c0735c36f5501d1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69289
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock')
| -rw-r--r-- | src/mainboard/asrock/b85m_pro4/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/asrock/h81m-hds/devicetree.cb | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb index 43a65f8197..7667392c1e 100644 --- a/src/mainboard/asrock/b85m_pro4/devicetree.cb +++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb @@ -4,6 +4,7 @@ chip northbridge/intel/haswell register "gpu_ddi_e_connected" = "1" device cpu_cluster 0 on + ops haswell_cpu_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end @@ -11,6 +12,7 @@ chip northbridge/intel/haswell end device domain 0 on + ops haswell_pci_domain_ops subsystemid 0x1849 0x0c00 inherit device pci 00.0 on end # Host bridge diff --git a/src/mainboard/asrock/h81m-hds/devicetree.cb b/src/mainboard/asrock/h81m-hds/devicetree.cb index 7b08af96d8..144c2475ad 100644 --- a/src/mainboard/asrock/h81m-hds/devicetree.cb +++ b/src/mainboard/asrock/h81m-hds/devicetree.cb @@ -4,6 +4,7 @@ chip northbridge/intel/haswell register "gpu_ddi_e_connected" = "1" device cpu_cluster 0 on + ops haswell_cpu_bus_ops chip cpu/intel/haswell device lapic 0 on end device lapic 0xacac off end @@ -11,6 +12,7 @@ chip northbridge/intel/haswell end device domain 0 on + ops haswell_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x1849 0x0c00 end |