mb/asrock: Add Z87E-ITX (Haswell)

This was done using Haswell autoport, with manual fixes to get the
output to build against current main. I do not physically have this
board; I was sent the output of autoport with some fixes on top of
which I added additional changes. The VBT was copied from
/sys/kernel/debug/dri/0/i915_vbt on version 2.70 of the vendor firmware.

The flash chip is 8MiB in a socketed DIP8 package, making it easy to
externally flash to recover from a brick.

Working:
- Haswell MRC.bin
- S3 suspend and resume
- Libgfxinit
- HDMI
- DVI-I (including passive DVI to VGA adapter)
- DisplayPort
- SATA ports
- mSATA SSD
- mPCIe WiFi slot
- Rear USB ports
- USB 3.0 header
- Audio header
- Ethernet
- x16 PCIe slot
- EHCI debug with the CH347 (top USB 2.0 port by the PS/2 connector)
- edk2 (MrChromebox uefipayload_202309)

Not Tested:
- PS/2 keyboard/mouse
- eSATA
- USB 2.0 header

Change-Id: I56c22d8f5505f9a4da25f8b4406b00978af1a586
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81022
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 132 insertions, 0 deletions

diff --git a/src/mainboard/asrock/z87e-itx/devicetree.cb b/src/mainboard/asrock/z87e-itx/devicetree.cb
new file mode 100644
index 0000000000..32883e4144
--- /dev/null
+++ b/src/mainboard/asrock/z87e-itx/devicetree.cb
@@ -0,0 +1,132 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+
+chip northbridge/intel/haswell
+	chip cpu/intel/haswell
+		device cpu_cluster 0 on ops haswell_cpu_bus_ops end
+	end
+
+	device domain 0 on
+		ops haswell_pci_domain_ops
+
+		device pci 00.0 on # Desktop Host bridge
+			subsystemid 0x1849 0x0c00
+		end
+		device pci 01.0 on end # PCIe Bridge for discrete graphics
+		device pci 02.0 on # Internal graphics VGA controller
+			subsystemid 0x1849 0x0412
+			register "gfx" = "GMA_STATIC_DISPLAYS(0)"
+			register "gpu_ddi_e_connected" = "1"
+			register "gpu_dp_b_hotplug" = "4"
+			register "gpu_dp_c_hotplug" = "4"
+			register "gpu_dp_d_hotplug" = "4"
+		end
+		device pci 03.0 on # Mini-HD audio
+			subsystemid 0x1849 0x0c0c
+		end
+
+		chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
+			register "gpe0_en_1" = "0x46"
+
+			device pci 14.0 on # xHCI Controller
+				subsystemid 0x1849 0x8c31
+			end
+			device pci 16.0 on # Management Engine Interface 1
+				subsystemid 0x1849 0x8c3a
+			end
+			device pci 16.1 off end # Management Engine Interface 2
+			device pci 16.2 off end # Management Engine IDE-R
+			device pci 16.3 off end # Management Engine KT
+			device pci 19.0 on # Intel Gigabit Ethernet
+				subsystemid 0x1849 0x153b
+			end
+			device pci 1a.0 on # USB2 EHCI #2
+				subsystemid 0x1849 0x8c2d
+			end
+			device pci 1b.0 on # High Definition Audio
+				subsystemid 0x1849 0x1150
+			end
+			device pci 1c.0 on end # PCIe Port #1
+			device pci 1c.1 on end # PCIe Port #2
+			device pci 1c.2 on end # PCIe Port #3
+			device pci 1c.3 on end # PCIe Port #4
+			device pci 1c.4 on end # PCIe Port #5
+			device pci 1c.5 on end # PCIe Port #6
+			device pci 1c.6 on end # PCIe Port #7
+			device pci 1c.7 on end # PCIe Port #8
+			device pci 1d.0 on # USB2 EHCI #1
+				subsystemid 0x1849 0x8c26
+			end
+			device pci 1f.0 on # LPC bridge
+				subsystemid 0x1849 0x8c44
+				register "gen1_dec" = "0x000c0291"
+				register "gen2_dec" = "0x000c0241"
+				register "gen3_dec" = "0x000c0251"
+
+				chip superio/nuvoton/nct6776
+					device pnp 2e.0   off end	# Floppy
+					device pnp 2e.1   off end	# Parallel
+					device pnp 2e.2   off end	# UART A
+					device pnp 2e.3   off end	# UART B, IR
+					device pnp 2e.5   on		# PS/2 Keyboard/Mouse
+						io  0x60 = 0x0060
+						io  0x62 = 0x0064
+						irq 0x70 = 1		# + Keyboard IRQ
+						irq 0x72 = 12		# + Mouse IRQ (unused)
+					end
+					device pnp 2e.6   off end	# CIR
+					device pnp 2e.7   on		# GPIO8
+						irq 0xe4 = 0xef		# + GPIO8 direction
+						irq 0xe5 = 0		# + GPIO8 value
+					end
+					device pnp 2e.107 off end	# GPIO9
+					device pnp 2e.8   off end	# WDT
+					device pnp 2e.108 off end	# GPIO0
+					device pnp 2e.208 on end	# GPIOA
+					device pnp 2e.308 off end	# GPIO base
+					device pnp 2e.109 on end	# GPIO1
+					device pnp 2e.209 on		# GPIO2
+						irq 0xe0 = 0xff		# + GPIO2 direction
+					end
+					device pnp 2e.309 off end	# GPIO3
+					device pnp 2e.409 off end	# GPIO4
+					device pnp 2e.509 on		# GPIO5
+						irq 0xf4 = 0x7f		# + GPIO5 direction
+						irq 0xf5 = 0x80		# + GPIO5 value
+					end
+					device pnp 2e.609 off end	# GPIO6
+					device pnp 2e.709 on end	# GPIO7
+					device pnp 2e.a   on		# ACPI
+						irq 0xe6 = 0x4c
+						irq 0xf0 = 0x40
+					end
+					device pnp 2e.b   on		# HWM, LED
+						irq 0x30 = 0xe1		# + Fan RPM sense pins
+						io  0x60 = 0x0290	# + HWM base address
+						irq 0x70 = 0
+						irq 0xf7 = 0		# + Front Panel Green LED
+					end
+					device pnp 2e.d   off end	# VID
+					device pnp 2e.e   off end	# CIR wake-up
+					device pnp 2e.f   off end	# GPIO PP/OD
+					device pnp 2e.14  off end	# SVID
+					device pnp 2e.16  off end	# Deep sleep
+					device pnp 2e.17  on		# GPIOA
+						irq 0xe0 = 0		# + GPIOA direction
+						irq 0xe1 = 0		# + GPIOA value
+					end
+				end
+			end
+			device pci 1f.2 on # SATA Controller (AHCI)
+				subsystemid 0x1849 0x8c02
+				register "sata_port0_gen3_dtle" = "0x2"
+				register "sata_port1_gen3_dtle" = "0x2"
+				register "sata_port_map" = "0x3f"
+			end
+			device pci 1f.3 on # SMBus
+				subsystemid 0x1849 0x8c22
+			end
+			device pci 1f.5 off end # SATA Controller (Legacy)
+			device pci 1f.6 off end # Thermal
+		end
+	end
+end