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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-11-21 17:40:37 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-12-03 08:08:18 +0100 |
| commit | 88ff8b541f0981359ce17021e9b41d57c6eb427b (patch) | |
| tree | d16b06d0e01d149f0fa2809c1a4c0bf48992496a /src/mainboard/asrock/imb-a180/romstage.c | |
| parent | 8c20a04cae5bcd15f289550eec0dcb2626ac5ce4 (diff) | |
AGESA fam15tn / fam15rl / fam16kb: Move LPC decode enable for serial port
Move LPC decode enable out of agesawrapper.c. It should not be on the
execution path of AP CPUs and function is not related to AGESA per se.
Change-Id: I19d6a20fbc7a3d28601caa9aaa1d73d6930257ae
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7602
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/asrock/imb-a180/romstage.c')
| -rw-r--r-- | src/mainboard/asrock/imb-a180/romstage.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c index 877d458b25..83155012e5 100644 --- a/src/mainboard/asrock/imb-a180/romstage.c +++ b/src/mainboard/asrock/imb-a180/romstage.c @@ -58,6 +58,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); + /* Set LPC decode enables. */ + pci_devfn_t dev = PCI_DEV(0, 0x14, 3); + pci_write_config32(dev, 0x44, 0xff03ffd5); + hudson_lpc_port80(); /* Enable the AcpiMmio space */ |