diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-01 23:25:09 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-07 13:57:15 +0000 |
| commit | 6baee3d28729d4b924e8f793c4c7311cebf1f80a (patch) | |
| tree | a3cdc029d4a28b9572ee0759a25ffe9480ab7372 /src/mainboard/asrock/imb-a180/bootblock.c | |
| parent | f9decbb0c720662d8e71fe221aef55b7ecf76196 (diff) | |
mb/*/*: Remove AMD agesa family16 boards
These boards use the LEGACY_SMP_INIT which is to be deprecated after
release 4.18.
Change-Id: I43c7075fb6418a86c57c863edccbcb750f8ed402
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/asrock/imb-a180/bootblock.c')
| -rw-r--r-- | src/mainboard/asrock/imb-a180/bootblock.c | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/src/mainboard/asrock/imb-a180/bootblock.c b/src/mainboard/asrock/imb-a180/bootblock.c deleted file mode 100644 index 9326330258..0000000000 --- a/src/mainboard/asrock/imb-a180/bootblock.c +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <amdblocks/acpimmio.h> -#include <bootblock_common.h> -#include <device/pnp_type.h> -#include <superio/winbond/common/winbond.h> -#include <superio/winbond/w83627uhg/w83627uhg.h> - -#define SERIAL_DEV PNP_DEV(0x2e, W83627UHG_SP1) - -void bootblock_mainboard_early_init(void) -{ - /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ - pm_write8(0xea, 0x1); - - /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */ - misc_write32(0x28, misc_read32(0x28) & 0xfff8ffff); - - /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */ - misc_write32(0x40, misc_read32(0x40) & 0xffffbffb); - - /* w83627uhg has a default clk of 48MHz, p.9 of data-sheet */ - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} |