diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-12-30 11:06:54 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2018-07-22 16:14:59 +0000 |
| commit | b7ff886f0ecdc84d0deb8e795e8ffd26516f09c4 (patch) | |
| tree | 7bd70256b3ccb875ced9547926682dec9bf410dd /src/mainboard/asrock/g41c-gs/gpio.c | |
| parent | e98f305abd5056da54e31ee23765eef98f56abc1 (diff) | |
mb/asrock/g41c-gs: Add g41m-gs variant
This board is quite similar to the other ones in this dir an can be
supported with little code changes.
TODO what works:
* DDR2 dual channel PC2-6400;
* SATA;
* USB;
* Ethernet;
* Audio;
* Native graphic init;
* SuperIO Sensors;
* Reboot, poweroff, S3 resume;
* Flashrom (vendor and coreboot);
TODO how tested:
Tests were run with SeaBIOS and Debian stretch, using Linux 4.9.65.
Change-Id: I6844efacaae109cf1e0894201852fddd8043a706
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/asrock/g41c-gs/gpio.c')
| -rw-r--r-- | src/mainboard/asrock/g41c-gs/gpio.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/src/mainboard/asrock/g41c-gs/gpio.c b/src/mainboard/asrock/g41c-gs/gpio.c index be0b66da89..b6ccbadae1 100644 --- a/src/mainboard/asrock/g41c-gs/gpio.c +++ b/src/mainboard/asrock/g41c-gs/gpio.c @@ -45,14 +45,22 @@ static const struct pch_gpio_set1 pch_gpio_set1_direction = { .gpio10 = GPIO_DIR_OUTPUT, .gpio12 = GPIO_DIR_INPUT, .gpio13 = GPIO_DIR_INPUT, +#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) + .gpio14 = GPIO_DIR_OUTPUT, +#else .gpio14 = GPIO_DIR_INPUT, +#endif .gpio15 = GPIO_DIR_OUTPUT, .gpio16 = GPIO_DIR_OUTPUT, .gpio18 = GPIO_DIR_OUTPUT, .gpio20 = GPIO_DIR_OUTPUT, .gpio24 = GPIO_DIR_OUTPUT, .gpio25 = GPIO_DIR_OUTPUT, +#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) + .gpio26 = GPIO_DIR_OUTPUT, +#else .gpio26 = GPIO_DIR_INPUT, +#endif .gpio27 = GPIO_DIR_OUTPUT, .gpio28 = GPIO_DIR_INPUT, }; @@ -68,15 +76,21 @@ static const struct pch_gpio_set1 pch_gpio_set1_level = { .gpio25 = GPIO_LEVEL_LOW, .gpio27 = GPIO_LEVEL_LOW, }; -#else /* BOARD_ASROCK_G41C_GS */ +#else /* BOARD_ASROCK_G41C_GS, BOARD_ASROCK_G41M_GS*/ static const struct pch_gpio_set1 pch_gpio_set1_level = { .gpio10 = GPIO_LEVEL_LOW, +#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) + .gpio14 = GPIO_LEVEL_HIGH, +#endif .gpio15 = GPIO_LEVEL_LOW, .gpio16 = GPIO_LEVEL_HIGH, .gpio18 = GPIO_LEVEL_LOW, .gpio20 = GPIO_LEVEL_HIGH, .gpio24 = GPIO_LEVEL_HIGH, .gpio25 = GPIO_LEVEL_LOW, +#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) + .gpio26 = GPIO_LEVEL_LOW, +#endif .gpio27 = GPIO_LEVEL_LOW, }; #endif @@ -84,6 +98,9 @@ static const struct pch_gpio_set1 pch_gpio_set1_level = { static const struct pch_gpio_set1 pch_gpio_set1_invert = { .gpio0 = GPIO_INVERT, .gpio6 = GPIO_INVERT, +#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) + .gpio8 = GPIO_INVERT, +#endif .gpio12 = GPIO_INVERT, .gpio13 = GPIO_INVERT, }; |