diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2014-07-19 00:21:43 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2014-10-30 11:41:26 +0100 |
| commit | c1869666f0904fe78c72265b44b46d1fc9f75a59 (patch) | |
| tree | 784646612633f3cf8896fa423e91af3116990507 /src/mainboard/asrock/e350m1/romstage.c | |
| parent | 16407abdddb13d74f2eb1c0ac6dc82b31dc6ea21 (diff) | |
mainboards/asrock/e350m1: Use driver for Nuvoton NCT5572D superio chip
On the ASRock E350M1 a Nuvoton NCT5572D is used as SuperIO-chip. The coreboot
port to this board however used the driver of the Winbond W83627HF SuperIO,
which is compatible enough to get most stuff working, but which clears bit 6 in
register 0x2B. This switches the function of pin 38 of the NCT5572D from
RSTOUT1# output to GP36. The PERST# pin of the ethernet chip and the
unpopulated miniPCIe slot are connected to this pin, so they didn't get reset
during a reboot.
Using the newly added driver for the Nuvoton NCT5572D fixes this problem.
There is also a trace from the pin 37 of the SuperIO, which can be configured
as RSTOUT2#, to pin 82 of the USB3-chip with unknown function.
As with the wrong driver, PS/2 keyboard and mouse do work in SeaBIOS and GRUB
but not in Linux.
Change-Id: I4bc78406afd3b0e10a1b04b561147e0ed94cc494
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/6266
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/asrock/e350m1/romstage.c')
| -rw-r--r-- | src/mainboard/asrock/e350m1/romstage.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c index 5223360686..47704ed269 100644 --- a/src/mainboard/asrock/e350m1/romstage.c +++ b/src/mainboard/asrock/e350m1/romstage.c @@ -33,14 +33,14 @@ #include "agesawrapper.h" #include <northbridge/amd/agesa/agesawrapper_call.h> #include "cpu/x86/bist.h" -#include <superio/winbond/common/winbond.h> -#include <superio/winbond/w83627hf/w83627hf.h> +#include <superio/nuvoton/common/nuvoton.h> +#include <superio/nuvoton/nct5572d/nct5572d.h> #include "cpu/x86/lapic.h" #include <sb_cimx.h> #include "SBPLATFORM.h" -#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) +#define SERIAL_DEV PNP_DEV(0x2e, NCT5572D_SP1) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -61,7 +61,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb_Poweron_Init(); post_code(0x31); - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); } |