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author | Krystian Hebel <krystian.hebel@3mdeb.com> | 2020-09-30 17:56:04 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-07-09 11:46:30 +0000 |
commit | 84a156c77e66b995583686e49effb50e39f94f65 (patch) | |
tree | a54923eac4d9f77eec156d9f3e799d9ae5ca577f /src/mainboard/asrock/e350m1/acpi/sata.asl | |
parent | 4676279151659922da8717712c523a103575a21a (diff) |
ppc64/byteorder.h: define use of big endian
All of the build configuration is set to produce big endian image on PPC64.
In addition, the toolchain produced by coreboot-sdk does not include little
endian libraries so it is not possible to build LE image even when that
configuration is changed.
This patch changes byte order definition which is required for proper work
of functions that deal with endianness, like read_{le,be}*() or
{le,be}*toh().
It also revealed bugs related to the endianness on BE targets that are
addressed in the following patches.
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Change-Id: Id31328a832d11db20822733304b0ae477e858d25
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55037
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/asrock/e350m1/acpi/sata.asl')
0 files changed, 0 insertions, 0 deletions