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authorFelix Held <felix-coreboot@felixheld.de>2014-07-19 00:21:43 +0200
committerNico Huber <nico.h@gmx.de>2014-10-30 11:41:26 +0100
commitc1869666f0904fe78c72265b44b46d1fc9f75a59 (patch)
tree784646612633f3cf8896fa423e91af3116990507 /src/mainboard/asrock/e350m1/BiosCallOuts.c
parent16407abdddb13d74f2eb1c0ac6dc82b31dc6ea21 (diff)
mainboards/asrock/e350m1: Use driver for Nuvoton NCT5572D superio chip
On the ASRock E350M1 a Nuvoton NCT5572D is used as SuperIO-chip. The coreboot port to this board however used the driver of the Winbond W83627HF SuperIO, which is compatible enough to get most stuff working, but which clears bit 6 in register 0x2B. This switches the function of pin 38 of the NCT5572D from RSTOUT1# output to GP36. The PERST# pin of the ethernet chip and the unpopulated miniPCIe slot are connected to this pin, so they didn't get reset during a reboot. Using the newly added driver for the Nuvoton NCT5572D fixes this problem. There is also a trace from the pin 37 of the SuperIO, which can be configured as RSTOUT2#, to pin 82 of the USB3-chip with unknown function. As with the wrong driver, PS/2 keyboard and mouse do work in SeaBIOS and GRUB but not in Linux. Change-Id: I4bc78406afd3b0e10a1b04b561147e0ed94cc494 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/6266 Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/asrock/e350m1/BiosCallOuts.c')
-rw-r--r--src/mainboard/asrock/e350m1/BiosCallOuts.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/mainboard/asrock/e350m1/BiosCallOuts.c b/src/mainboard/asrock/e350m1/BiosCallOuts.c
index e88f4f944f..7a4ee2674d 100644
--- a/src/mainboard/asrock/e350m1/BiosCallOuts.c
+++ b/src/mainboard/asrock/e350m1/BiosCallOuts.c
@@ -24,11 +24,6 @@
#include "SB800.h"
#include <stdlib.h>
-/* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess?
- *
- * Board is known to have some issues with integrated NIC and
- * might need implementation to drive some GPIOs.
- */
static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
@@ -100,6 +95,9 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *Config
TempData8 |= Data8;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
+ /* this seems to be just copy-pasted from the AMD reference boards and needs
+ * some investigation
+ */
switch(MemData->ParameterListPtr->DDR3Voltage){
case VOLT1_35:
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);