diff options
author | Eric Biederman <ebiederm@xmission.com> | 2003-09-02 17:16:48 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2003-09-02 17:16:48 +0000 |
commit | 0ac6b41e70b2df365f8579c6e14214c42ab4c91b (patch) | |
tree | 40e26dbeec991f1df5e43da3e1ee9f25151b89d0 /src/mainboard/arima/hdama/Config.lb | |
parent | e9a271e32c53076445ef70da8aec8201c82693ec (diff) |
- 1.1.4
Major restructuring of hypertransport handling.
Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically
Updates to hard_reset handling when resetting because of the need to change hypertransport link
speeds and widths.
(a) No longer assume the boot is good just because we get to a hard reset point.
(b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the
boot counter.
Updates to arima/hdama mptable so it tracks the new bus numbers
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/arima/hdama/Config.lb')
-rw-r--r-- | src/mainboard/arima/hdama/Config.lb | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/mainboard/arima/hdama/Config.lb b/src/mainboard/arima/hdama/Config.lb index 80c3bfca11..824e43ff67 100644 --- a/src/mainboard/arima/hdama/Config.lb +++ b/src/mainboard/arima/hdama/Config.lb @@ -222,6 +222,7 @@ mainboardinit cpu/k8/disable_mmx_sse.inc ## Include the secondary Configuration files ## dir /pc80 +config chip.h northbridge amd/amdk8 "mc0" pci 0:18.0 @@ -263,12 +264,12 @@ northbridge amd/amdk8 "mc0" end northbridge amd/amdk8 "mc1" - #pci 0:19.0 - #pci 0:19.0 - #pci 0:19.0 - #pci 0:19.1 - #pci 0:19.2 - #pci 0:19.3 + pci 0:19.0 + pci 0:19.0 + pci 0:19.0 + pci 0:19.1 + pci 0:19.2 + pci 0:19.3 end cpu k8 "cpu0" |