diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-04-02 22:49:27 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-04-05 13:16:36 +0000 |
| commit | f2e8660fa24b9e153967cc7e01486793806f9779 (patch) | |
| tree | 0cbe6fd5eb9c7b3b833b939b9e7521408ec46903 /src/mainboard/apple | |
| parent | e24f97c081f3e134362081913793d5adb90eddd5 (diff) | |
sandybridge boards: Drop default `pci_mmio_size`
2 GiB is the default already.
Change-Id: I294460949659c97d4e19ad4e9d14f8c3566cca3f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52071
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/apple')
| -rw-r--r-- | src/mainboard/apple/macbookair4_2/devicetree.cb | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/apple/macbookair4_2/devicetree.cb b/src/mainboard/apple/macbookair4_2/devicetree.cb index 50507586ee..ee192cf637 100644 --- a/src/mainboard/apple/macbookair4_2/devicetree.cb +++ b/src/mainboard/apple/macbookair4_2/devicetree.cb @@ -23,8 +23,6 @@ chip northbridge/intel/sandybridge end end - register "pci_mmio_size" = "2048" - device domain 0x0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "c2_latency" = "0x0065" |