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authorKevin Chiu <kevin.chiu.17802@gmail.com>2021-12-14 10:17:29 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-01-04 14:53:51 +0000
commitcb8c3ddaea1c023a2c83b42d36ef2c4e9f331546 (patch)
tree1e90a4d91c3d4e71b1d8efe2db0ea45185ae3639 /src/mainboard/apple
parent219bda737e5deea2b62277f453a6a853911a797a (diff)
mb/google/guybrush/var/nipperkin: update USB 2.0 controller Lane Parameter
Enhance USB 2.0 SI by increasing the level of "HS DC Voltage Level" and "Disconnect Threshold Adjustment" per port: port#0: COMPDISTUNE0: 0x1->0x5 / TXVREFTUNE0: 0x3->0x9 port#1: COMPDISTUNE0: 0x1->0x5 / TXVREFTUNE0: 0x3->0x9 port#4: COMPDISTUNE0: 0x1->0x6 / TXVREFTUNE0: 0x3->0xE port#5: COMPDISTUNE0: 0x1->0x5 / TXVREFTUNE0: 0x3->0x9 BUG=b:203049656 BRANCH=guybrush TEST=1. emerge-guybrush coreboot chromeos-bootimage 2. pass USB eye diagram verification Change-Id: If5a6563e93bfa6beb529a5593fcc9124ce62d77f Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60089 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/mainboard/apple')
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