diff options
| author | Evgeny Zinoviev <me@ch1p.com> | 2019-05-10 02:04:59 +0300 |
|---|---|---|
| committer | Evgeny Zinoviev <me@ch1p.io> | 2021-02-10 15:26:12 +0300 |
| commit | a513995faba4959c3a7a11123bf57b42857659a4 (patch) | |
| tree | f15de17f7687e024b9987bd143be9a9ee32a0b82 /src/mainboard/apple/macbookpro10_1/cmos.layout | |
| parent | 67c4ac4764c85aacc1ace749b3e4a6c0781de990 (diff) | |
mb/apple: Add MacBook Pro 10,1 (A1398) supportmacbookpro10_1
MacBook Pro 15 (Mid 2012/Early 2013) with Ivy Bridge CPU
and Retina Display.
Not all RAM configurations are supported at the monent, see comment
in early_init.c.
Used autoported config as a template.
Change-Id: Ica03aba442493c0d369a3d360ad569ddc16954df
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Diffstat (limited to 'src/mainboard/apple/macbookpro10_1/cmos.layout')
| -rw-r--r-- | src/mainboard/apple/macbookpro10_1/cmos.layout | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/src/mainboard/apple/macbookpro10_1/cmos.layout b/src/mainboard/apple/macbookpro10_1/cmos.layout new file mode 100644 index 0000000000..4172d68834 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/cmos.layout @@ -0,0 +1,76 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 6 debug_level + +# coreboot config options: southbridge +408 1 e 1 nmi +409 2 e 7 power_on_after_fail + +# coreboot config options: ME +425 1 e 13 me_state +426 2 h 0 me_state_prev + +# coreboot config options: northbridge +432 3 e 11 gfx_uma_size +435 2 e 12 hybrid_graphics_mode + +# SandyBridge MRC Scrambler Seed values +896 32 r 0 mrc_scrambler_seed +928 32 r 0 mrc_scrambler_seed_s3 +960 16 r 0 mrc_scrambler_seed_chk + +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew +7 0 Disable +7 1 Enable +7 2 Keep +11 0 32M +11 1 64M +11 2 96M +11 3 128M +11 4 160M +11 5 192M +11 6 224M +12 0 Integrated Only +12 1 Discrete Only +13 0 Normal +13 1 Disabled + +# ----------------------------------------------------------------- +checksums + +checksum 392 447 984 |