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authorFelix Held <felix-coreboot@felixheld.de>2022-11-03 22:52:04 +0100
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-11-09 15:47:04 +0000
commitd92bb3c3f1447e6731a9694f16338c48e5d9f954 (patch)
treebc85c91a0f6a2377d60b6e9234637730d0c17a21 /src/mainboard/amd
parent600fa266bdc8740126420e63579a5b9d103ca960 (diff)
soc/amd/picasso/acpi: rename pcie.asl to pci_int_defs.asl
This aligns Picasso more with the newer AMD SoCs and also makes it a bit clearer what this file does. Also remove the unneeded tabs at the beginning of each line. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ie6e5ee815e4346004bc864a6111a255dc689eae8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69187 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/bilby/dsdt.asl2
-rw-r--r--src/mainboard/amd/mandolin/dsdt.asl2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/amd/bilby/dsdt.asl b/src/mainboard/amd/bilby/dsdt.asl
index e0059c9c3e..140f3950e0 100644
--- a/src/mainboard/amd/bilby/dsdt.asl
+++ b/src/mainboard/amd/bilby/dsdt.asl
@@ -17,7 +17,7 @@ DefinitionBlock (
#include <globalnvs.asl>
/* PCI IRQ mapping for the Southbridge */
- #include <pcie.asl>
+ #include <pci_int_defs.asl>
/* Power state notification to ALIB */
#include <pnot.asl>
diff --git a/src/mainboard/amd/mandolin/dsdt.asl b/src/mainboard/amd/mandolin/dsdt.asl
index e0059c9c3e..140f3950e0 100644
--- a/src/mainboard/amd/mandolin/dsdt.asl
+++ b/src/mainboard/amd/mandolin/dsdt.asl
@@ -17,7 +17,7 @@ DefinitionBlock (
#include <globalnvs.asl>
/* PCI IRQ mapping for the Southbridge */
- #include <pcie.asl>
+ #include <pci_int_defs.asl>
/* Power state notification to ALIB */
#include <pnot.asl>