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authorSridhar Siricilla <sridhar.siricilla@intel.corp-partner.google.com>2021-11-26 11:03:36 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-12-20 17:51:27 +0000
commitaff245772386a0a1d46265e6c7ed97a25c8da077 (patch)
treec2495bfda35681865456ba50a86d7e5e78343403 /src/mainboard/amd
parent58ce8b7db04fef9b6753855efd819bed50f29207 (diff)
commonlib: Add new TS for CSE firmware Sync
The patch defines new TS for CSE firmware synchronization. Also, removes unused TS_FIT_UCODE_LOADED TS. TEST=Build the code for Brya Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I9ed82c5358eb94b5e7c91b9fd783c5e09189b77a Reviewed-on: https://review.coreboot.org/c/coreboot/+/59668 Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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