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authorFelix Held <felix.held@amd.corp-partner.google.com>2020-06-24 19:32:05 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-06-26 16:08:12 +0000
commit3d53d5397fcdae685897f28c17d3c0af3a886af9 (patch)
treefddf220706b5ca8acbc9719be489a358ab2d77fe /src/mainboard/amd
parent23cdcb8bef2600e16d0abd438044de2a39194946 (diff)
mb/amd/mandolin/devicetree: add comment about chip behind GPP bridge 3
Change-Id: Ie1fcfb18a3ccf08c62210eec07d8965696f11da9 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42783 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/mandolin/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/amd/mandolin/devicetree.cb b/src/mainboard/amd/mandolin/devicetree.cb
index 179582b673..01670485d7 100644
--- a/src/mainboard/amd/mandolin/devicetree.cb
+++ b/src/mainboard/amd/mandolin/devicetree.cb
@@ -45,7 +45,7 @@ chip soc/amd/picasso
device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU
device pci 1.0 on end # Dummy Host Bridge
- device pci 1.3 on end # Bridge
+ device pci 1.3 on end # Bridge to PCIe Ethernet chip
device pci 8.0 on end # Dummy Host Bridge
device pci 8.1 on # Bridge to Bus A
device pci 0.0 on end # Internal GPU