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authorMyles Watson <mylesgw@gmail.com>2009-11-06 17:02:51 +0000
committerMyles Watson <mylesgw@gmail.com>2009-11-06 17:02:51 +0000
commit1d6d45e3c98e16cbb86915483f771a7bf0e9a633 (patch)
tree38eca17371ca6c9e47b0b403d016eb163327b01b /src/mainboard/amd
parent637309d65e6448d34cc92d44f92a93324c154e79 (diff)
Split the two usages of __ROMCC__:
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them." __PRE_RAM__ means "Use simpler versions of functions, and no device tree." There are probably some places where both are tested, but only one is needed. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/dbm690t/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/amd/pistachio/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah/apc_auto.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c2
6 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
index b058b445f3..c83759bbad 100644
--- a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
+++ b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
@@ -18,7 +18,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define K8_SET_FIDVID 1
diff --git a/src/mainboard/amd/pistachio/cache_as_ram_auto.c b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
index 4615901fe7..2e5c4a0812 100644
--- a/src/mainboard/amd/pistachio/cache_as_ram_auto.c
+++ b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
@@ -18,7 +18,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define K8_SET_FIDVID 1
diff --git a/src/mainboard/amd/serengeti_cheetah/apc_auto.c b/src/mainboard/amd/serengeti_cheetah/apc_auto.c
index a855c2fd39..6abebffe13 100644
--- a/src/mainboard/amd/serengeti_cheetah/apc_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/apc_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
index a3e2b164a5..2626f8012a 100644
--- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c b/src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c
index ea7e2a6b29..a62811a228 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c
@@ -18,7 +18,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
index abb28917c1..0b136ec910 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
@@ -19,7 +19,7 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define SYSTEM_TYPE 0 /* SERVER */
//#define SYSTEM_TYPE 1 /* DESKTOP */