diff options
| author | Zheng Bao <zheng.bao@amd.com> | 2010-04-23 17:37:41 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-23 17:37:41 +0000 |
| commit | 1ad9f29886a547d597b609d496512d151b5c6531 (patch) | |
| tree | 4d2c994d6e0546e41596e7fd398eb453276e9ed6 /src/mainboard/amd/tilapia_fam10/mb_sysconf.h | |
| parent | eedf7a646c36ee5c48a996e2c571223e2eae244b (diff) | |
AMD Tilapia board support as a demonstration of an AMD Fam10 DDR3 board.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/tilapia_fam10/mb_sysconf.h')
| -rw-r--r-- | src/mainboard/amd/tilapia_fam10/mb_sysconf.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/src/mainboard/amd/tilapia_fam10/mb_sysconf.h b/src/mainboard/amd/tilapia_fam10/mb_sysconf.h new file mode 100644 index 0000000000..8827fb6114 --- /dev/null +++ b/src/mainboard/amd/tilapia_fam10/mb_sysconf.h @@ -0,0 +1,45 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef MB_SYSCONF_H + +#define MB_SYSCONF_H + +struct mb_sysconf_t { + u8 bus_isa; + u8 bus_8132_0; + u8 bus_8132_1; + u8 bus_8132_2; + u8 bus_8111_0; + u8 bus_8111_1; + u8 bus_8132a[31][3]; + u8 bus_8151[31][2]; + + u32 apicid_8111; + u32 apicid_8132_1; + u32 apicid_8132_2; + u32 apicid_8132a[31][2]; + u32 sbdn3; + u32 sbdn3a[31]; + u32 sbdn5[31]; + u32 bus_type[256]; +}; + +#endif + |