mb/amd/thatcher: Switch away from ROMCC_BOOTBLOCK

Warning: Not tested on hardware.

Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I948eeaaeb7975561fffc1218c70dba6a784101fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38877
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 34 insertions, 0 deletions

diff --git a/src/mainboard/amd/thatcher/bootblock.c b/src/mainboard/amd/thatcher/bootblock.c
new file mode 100644
index 0000000000..d25102541c
--- /dev/null
+++ b/src/mainboard/amd/thatcher/bootblock.c
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <amdblocks/acpimmio.h>
+#include <bootblock_common.h>
+#include <stdint.h>
+#include <device/pci_ops.h>
+#include <console/console.h>
+#include <superio/smsc/lpc47n217/lpc47n217.h>
+
+#define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1)
+
+void bootblock_mainboard_early_init(void)
+{
+	post_code(0x30);
+	post_code(0x31);
+
+	gpio_100_write8(0x1, 0x98);
+
+	/* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */
+	pm_write8(0xea, 0x1);
+
+	lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+}