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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-12-31 12:56:53 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-12-31 12:56:53 +0000 |
| commit | 1bb68289001f95b49499ac8eb483a7a10e64cc52 (patch) | |
| tree | c1d60ba92227bc29ef48c0afb273db4825524dd2 /src/mainboard/amd/serengeti_cheetah_fam10/Kconfig | |
| parent | 9db833bec394b886ca990965970cdb100b65d9ac (diff) | |
romcc:
- Set __PRE_RAM__ define per default
- Properly handle ignored (#ifdef'd out) #include lines
amd/serengeti_cheetah_fam10:
- write ACPI files to $(obj) instead of the top dir (alias $(CURDIR))
tinybootblock:
- provide a way to define code that should be added to the bootblock,
to map the entire ROM for use by CBFS
amd/model_fxx, amd/model_10xxx:
- add CONFIG_SSE
walkcbfs.S:
- eliminate the use of two registers, to make space for romcc to wiggle
amd/serengeti_cheetah_fam10:
- use the enable_rom framework. not entirely functional yet
Boot-tested on emulation/qemu-x86
Build-tested on amd/serengeti_cheetah_fam10
amd/serengeti_cheetah_fam10 fails in amdht/ somewhere, but builds
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/serengeti_cheetah_fam10/Kconfig')
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah_fam10/Kconfig | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig index 9a2ec2d2ec..777d846cc0 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig @@ -20,6 +20,7 @@ config BOARD_AMD_SERENGETI_CHEETAH_FAM10 select BOARD_ROMSIZE_KB_1024 select ENABLE_APIC_EXT_ID select LIFT_BSP_APIC_ID + select TINY_BOOTBLOCK config MAINBOARD_DIR string @@ -127,3 +128,12 @@ config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID default 0x1022 depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 +config RAMBASE + hex + default 0x200000 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 + +config ID_SECTION_OFFSET + hex + default 0x80 + depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10 |