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authorMyles Watson <mylesgw@gmail.com>2009-10-16 16:32:57 +0000
committerMyles Watson <mylesgw@gmail.com>2009-10-16 16:32:57 +0000
commit0f61a4fc98f135c0ed22c67ee3241bf5670a61e2 (patch)
treeb3867408477cdf8a3a2374f32d91b4f3936b7486 /src/mainboard/amd/serengeti_cheetah
parent9969bdc4fb3d36a39ed9efb67ef0bf638a4e8e09 (diff)
Change CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP to match CONFIG_RAMBASE.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/serengeti_cheetah')
-rw-r--r--src/mainboard/amd/serengeti_cheetah/Options.lb4
-rw-r--r--src/mainboard/amd/serengeti_cheetah/apc_auto.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/Options.lb b/src/mainboard/amd/serengeti_cheetah/Options.lb
index dc57febc81..a20289d794 100644
--- a/src/mainboard/amd/serengeti_cheetah/Options.lb
+++ b/src/mainboard/amd/serengeti_cheetah/Options.lb
@@ -80,7 +80,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
uses CONFIG_PCI_64BIT_PREF_MEM
-uses CONFIG_LB_MEM_TOPK
+uses CONFIG_RAMTOP
uses CONFIG_AP_CODE_IN_CAR
@@ -107,7 +107,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
default CONFIG_FAILOVER_SIZE=0x01000
#more 1M for pgtbl
-default CONFIG_LB_MEM_TOPK=2048
+default CONFIG_RAMTOP=2048*1024
##
## Build code for the fallback boot
diff --git a/src/mainboard/amd/serengeti_cheetah/apc_auto.c b/src/mainboard/amd/serengeti_cheetah/apc_auto.c
index 5a173e006b..c8723e6fbf 100644
--- a/src/mainboard/amd/serengeti_cheetah/apc_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/apc_auto.c
@@ -75,7 +75,7 @@ static inline unsigned get_nodes(void)
void hardwaremain(int ret_addr)
{
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
- struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
+ struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
struct node_core_id id;