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authorRonald G. Minnich <rminnich@gmail.com>2006-03-14 19:58:14 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-03-14 19:58:14 +0000
commitc994c973c654817f5e764615776b78b84cd21910 (patch)
tree37e35c7cd905ef9b5cacc8dbd76628c134e5f68c /src/mainboard/amd/rumba
parentd96e098def3ed64be0b775d4a6c058821e33b5ef (diff)
Fix for nehemiah
other fixes for gx2 ram init. support for sharplfg00l04 -- not working yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/rumba')
-rw-r--r--src/mainboard/amd/rumba/auto.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/auto.c
index 72d1ef4e0e..19f7049c8e 100644
--- a/src/mainboard/amd/rumba/auto.c
+++ b/src/mainboard/amd/rumba/auto.c
@@ -19,6 +19,24 @@
#include "southbridge/amd/cs5535/cs5535_early_smbus.c"
#include "southbridge/amd/cs5535/cs5535_early_setup.c"
#include "northbridge/amd/gx2/raminit.h"
+
+static void sdram_set_spd_registers(const struct mem_controller *ctrl) {
+ msr_t msr;
+ /* 1. Initialize GLMC registers base on SPD values,
+ * Hard coded as XpressROM for now */
+ //print_debug("sdram_enable step 1\r\n");
+ msr = rdmsr(0x20000018);
+ msr.hi = 0x10076013;
+ msr.lo = 0x00003000;
+ wrmsr(0x20000018, msr);
+
+ msr = rdmsr(0x20000019);
+ msr.hi = 0x18000108;
+ msr.lo = 0x696332a3;
+ wrmsr(0x20000019, msr);
+
+
+}
#include "northbridge/amd/gx2/raminit.c"
#include "sdram/generic_sdram.c"