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authorMarc Jones <marc.jones@amd.com>2007-05-04 19:09:01 +0000
committerStefan Reinauer <stepan@openbios.org>2007-05-04 19:09:01 +0000
commit08da4f1fce68748c2aea8ef5ff4109ea6d3f0d82 (patch)
treee96a1e8f839f8080d019e2670ce9a1c1ed846fa3 /src/mainboard/amd/rumba
parenta67d4fd1ffffc76c328717f2519e3d7e7792f2b8 (diff)
This repairs the other Geode mainboards so they'll build with the new
Geode changes. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/rumba')
-rw-r--r--src/mainboard/amd/rumba/Config.lb2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/amd/rumba/Config.lb b/src/mainboard/amd/rumba/Config.lb
index 2f28d1ae0a..ffa06d5e09 100644
--- a/src/mainboard/amd/rumba/Config.lb
+++ b/src/mainboard/amd/rumba/Config.lb
@@ -134,8 +134,6 @@ chip northbridge/amd/gx2
device pci 1.1 on end
chip southbridge/amd/cs5536
register "lpc_serirq_enable" = "0x80" # enabled with default timing
- register "lpc_irq" = "((1<<3)|(1<<4))" # IRQ 3 & 4
- register "enable_gpio0_inta" = "1"
device pci d.0 on end # Realtek 8139 LAN
device pci f.0 on end # ISA Bridge
device pci f.2 on end # IDE Controller