diff options
author | Eric Biederman <ebiederm@xmission.com> | 2004-11-05 10:48:04 +0000 |
---|---|---|
committer | Eric Biederman <ebiederm@xmission.com> | 2004-11-05 10:48:04 +0000 |
commit | 709850a21b1bdfb0018aa2a7ee06a7407bbd465c (patch) | |
tree | 9aa0549858c03180139a7d528e5cb21982eff1ba /src/mainboard/amd/quartet | |
parent | d0805e0b55e63957b3641fa70cf1db624389e3f6 (diff) |
- Ensure every copy of Options.lb uses:
CROSS_COMPILE
CC
HOSTCC
OBJCOPY
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/quartet')
-rw-r--r-- | src/mainboard/amd/quartet/Options.lb | 8 | ||||
-rw-r--r-- | src/mainboard/amd/quartet/auto.c | 3 |
2 files changed, 7 insertions, 4 deletions
diff --git a/src/mainboard/amd/quartet/Options.lb b/src/mainboard/amd/quartet/Options.lb index 77e54aa3aa..2de7258e12 100644 --- a/src/mainboard/amd/quartet/Options.lb +++ b/src/mainboard/amd/quartet/Options.lb @@ -34,8 +34,6 @@ uses MAINBOARD_VENDOR uses MAINBOARD uses LINUXBIOS_EXTRA_VERSION uses _RAMBASE -uses CC -uses HOSTCC uses TTYS0_BAUD uses TTYS0_BASE uses TTYS0_LCS @@ -43,6 +41,10 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 +uses CROSS_COMPILE +uses CC +uses HOSTCC +uses OBJCOPY ### @@ -157,7 +159,7 @@ default CONFIG_ROM_STREAM = 1 ## ## The default compiler ## -default CC="gcc -m32" +default CC="$(CROSS_COMPILE)gcc -m32" default HOSTCC="gcc" ## diff --git a/src/mainboard/amd/quartet/auto.c b/src/mainboard/amd/quartet/auto.c index 6a3b2194e7..748e0d72ea 100644 --- a/src/mainboard/amd/quartet/auto.c +++ b/src/mainboard/amd/quartet/auto.c @@ -154,7 +154,8 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" -#include "resourcemap.c" /* quartet does not want the default */ +/* quartet does not want the default */ +#include "resourcemap.c" #define RC0 ((1<<1)<<8) #define RC1 ((1<<2)<<8) |