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authorMike Loptien <mike.loptien@se-eng.com>2014-06-06 15:21:28 -0600
committerMike Loptien <mike.loptien@se-eng.com>2014-06-16 18:38:47 +0200
commitcbc783f3e1b31b03e163af928fee8d67dfd6678e (patch)
tree6f3dc11a662befcc4f92014c369bd917d57e9696 /src/mainboard/amd/persimmon/get_bus_conf.c
parentd0167d3ae268e3fcdef5c02e381b47dbb04ab1a4 (diff)
Persimmon: Change MPTable to use mainboard IRQ routing
With the addition of the mainboard PCI IRQ routing tables for AMD Persimmon, the MPTables can be set to use this information to accurately reflect the real hardware settings of the system. Additionally, the IOAPIC gets defined before the MPTable gets generated so the settings can be read directly from the IOAPIC registers instead of 'guessing' at them as was done before. Change-Id: I96ec046a2208eddf4b5e442214ff43d2a349ca4d Signed-off-by: Mike Loptien <mike.loptien@se-eng.com> Reviewed-on: http://review.coreboot.org/5878 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/amd/persimmon/get_bus_conf.c')
-rw-r--r--src/mainboard/amd/persimmon/get_bus_conf.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mainboard/amd/persimmon/get_bus_conf.c b/src/mainboard/amd/persimmon/get_bus_conf.c
index 258d895736..ac65a1dc06 100644
--- a/src/mainboard/amd/persimmon/get_bus_conf.c
+++ b/src/mainboard/amd/persimmon/get_bus_conf.c
@@ -25,6 +25,7 @@
#include <stdlib.h>
#include <cpu/amd/amdfam14.h>
#include "agesawrapper.h"
+#include <arch/ioapic.h>
#if CONFIG_AMD_SB_CIMX
#include <sb_cimx.h>
#endif
@@ -36,6 +37,7 @@
u8 bus_isa;
u8 bus_sb800[6];
u32 apicid_sb800;
+u32 apicver_sb800;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
@@ -138,7 +140,14 @@ void get_bus_conf(void)
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
apicid_base = CONFIG_MAX_CPUS;
- apicid_sb800 = apicid_base;
+
+ /*
+ * By the time this function gets called, the IOAPIC registers
+ * have been written so they can be read to get the correct
+ * APIC ID and Version
+ */
+ apicid_sb800 = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
+ apicver_sb800 = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
#if CONFIG_AMD_SB_CIMX
sb_Late_Post();