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| author | zbao <fishbaozi@gmail.com> | 2012-07-19 16:39:01 +0800 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-07-22 13:10:02 +0200 |
| commit | 323a9236954cd847ad36c9b48b97fe9f74c49ea4 (patch) | |
| tree | d71daf8a1a09ba82e075e5834598c3b9bbe18bbc /src/mainboard/amd/parmer/acpi/AmdImc.asl | |
| parent | 6db7f348ea35e25b880edb73e4c322a361c1a8c9 (diff) | |
Mainboard Parmer based on Trinity
Parmer has.
1. Trinity, Socket FS1R2.
2. Hudson A75.
Ubuntu has been validated on Parmer. S3 is supported.
Change-Id: I1a6932d0ca9f7abe78dc24d3bc238a4b5a48281b
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1158
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/amd/parmer/acpi/AmdImc.asl')
| -rw-r--r-- | src/mainboard/amd/parmer/acpi/AmdImc.asl | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/src/mainboard/amd/parmer/acpi/AmdImc.asl b/src/mainboard/amd/parmer/acpi/AmdImc.asl new file mode 100644 index 0000000000..937c10acc2 --- /dev/null +++ b/src/mainboard/amd/parmer/acpi/AmdImc.asl @@ -0,0 +1,95 @@ +//BTDC Due to IMC Fan, ACPI control codes +OperationRegion(IMIO, SystemIO, 0x3E, 0x02) +Field(IMIO , ByteAcc, NoLock, Preserve) { + IMCX,8, + IMCA,8 +} + +IndexField(IMCX, IMCA, ByteAcc, NoLock, Preserve) { + Offset(0x80), + MSTI, 8, + MITS, 8, + MRG0, 8, + MRG1, 8, + MRG2, 8, + MRG3, 8, +} + +Method(WACK, 0) +{ + Store(0, Local0) + While (LNotEqual(Local0, 0xFA)) { + Store(MRG0, Local0) + Sleep(10) + } +} + +//Init +Method (ITZE, 0) +{ + Store(0, MRG0) + Store(0xB5, MRG1) + Store(0, MRG2) + Store(0x96, MSTI) + WACK() + + Store(0, MRG0) + Store(0, MRG1) + Store(0, MRG2) + Store(0x80, MSTI) + WACK() + + Or(MRG2, 0x01, Local0) + + Store(0, MRG0) + Store(0, MRG1) + Store(Local0, MRG2) + Store(0x81, MSTI) + WACK() +} + +//Sleep +Method (IMSP, 0) +{ + Store(0, MRG0) + Store(0xB5, MRG1) + Store(0, MRG2) + Store(0x96, MSTI) + WACK() + + Store(0, MRG0) + Store(1, MRG1) + Store(0, MRG2) + Store(0x98, MSTI) + WACK() + + Store(0, MRG0) + Store(0xB4, MRG1) + Store(0, MRG2) + Store(0x96, MSTI) + WACK() +} + +//Wake +Method (IMWK, 0) +{ + Store(0, MRG0) + Store(0xB5, MRG1) + Store(0, MRG2) + Store(0x96, MSTI) + WACK() + + Store(0, MRG0) + Store(0, MRG1) + Store(0, MRG2) + Store(0x80, MSTI) + WACK() + + Or(MRG2, 0x01, Local0) + + Store(0, MRG0) + Store(0, MRG1) + Store(Local0, MRG2) + Store(0x81, MSTI) + WACK() +} |