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authorFelix Held <felix-coreboot@felixheld.de>2021-06-15 20:57:04 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-06-17 14:21:58 +0000
commit361bb53aa2bb6314bf22690f5436af7c096d0e0a (patch)
treed0e4682ef6d9c644a4ab80de4a2ceb1eb3b7503c /src/mainboard/amd/mandolin/variants/cereme
parentddbc771524a2a127dd51f711b6d88b13884c2164 (diff)
soc/amd/picasso: introduce and use devicetree aliases for UART0-3
Since the default state of the MMIO UART devices in the chipset devicetree is off, the mainboard devicetree entries that disable MMIO UART devices are removed. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I913a587802020ce4e182b48632cdde1104c2a6e6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55545 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/amd/mandolin/variants/cereme')
-rw-r--r--src/mainboard/amd/mandolin/variants/cereme/devicetree.cb6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb b/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb
index 6a1a3bc0a7..628ba64725 100644
--- a/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb
+++ b/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb
@@ -163,9 +163,7 @@ chip soc/amd/picasso
end
end # domain
- device mmio 0xfedc9000 on end # UART0
- device mmio 0xfedca000 on end # UART1
- device mmio 0xfedce000 off end # UART2
- device mmio 0xfedcf000 off end # UART3
+ device ref uart_0 on end # console
+ device ref uart_1 on end
end # chip soc/amd/picasso