diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-06-13 15:57:06 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-23 21:18:25 +0000 |
| commit | ff01bca624283ba149c90a32d8f5655f27749a85 (patch) | |
| tree | 9f4a2acbcd62ea69b726b0034808ade61f1b4483 /src/mainboard/amd/majolica | |
| parent | ad489b8a2719e85933e21b14dede0a7f5833bcf9 (diff) | |
ChromeOS: Refactor ACPI CNVS generation
Remove chromeos_dsdt_generator() calls under mainboard, it
is possible to make the single call to fill \CNVS and
\OIPG without leveraging device operations.
Change-Id: Id79af96bb6c038d273ac9c4afc723437fc1f3fc9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55502
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/amd/majolica')
| -rw-r--r-- | src/mainboard/amd/majolica/mainboard.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/amd/majolica/mainboard.c b/src/mainboard/amd/majolica/mainboard.c index 2dd2d57241..252763b996 100644 --- a/src/mainboard/amd/majolica/mainboard.c +++ b/src/mainboard/amd/majolica/mainboard.c @@ -7,7 +7,6 @@ #include <soc/acpi.h> #include <string.h> #include <types.h> -#include <vendorcode/google/chromeos/chromeos.h> /* * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. @@ -95,8 +94,6 @@ static void mainboard_enable(struct device *dev) init_tables(); /* Initialize the PIRQ data structures for consumption */ pirq_setup(); - - dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } struct chip_operations mainboard_ops = { |