AMD Mahogany Fam10 ACPI table fixes.

Fix the ACPI IRQ routing. Also. fix the SSDT generations and TOM2 fixup.

Change-Id: I03e6de7bb58440058306c9c9888eb2961748c385
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/574
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 53 insertions, 27 deletions

diff --git a/src/mainboard/amd/mahogany_fam10/acpi/routing.asl b/src/mainboard/amd/mahogany_fam10/acpi/routing.asl
index 7b581b4fd4..76a9bfade3 100644
--- a/src/mainboard/amd/mahogany_fam10/acpi/routing.asl
+++ b/src/mainboard/amd/mahogany_fam10/acpi/routing.asl
@@ -31,6 +31,8 @@ Scope(\_SB) {
 		/* NB devices */
 		/* Bus 0, Dev 0 - RS780 Host Controller */
 		/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
+		Package(){0x0001FFFF, 0, INTC, 0 },
+		Package(){0x0001FFFF, 1, INTD, 0 },
 		/* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
 		Package(){0x0002FFFF, 0, INTC, 0 },
 		Package(){0x0002FFFF, 1, INTD, 0 },
@@ -57,22 +59,45 @@ Scope(\_SB) {
 		Package(){0x0007FFFF, 1, INTA, 0 },
 		Package(){0x0007FFFF, 2, INTB, 0 },
 		Package(){0x0007FFFF, 3, INTC, 0 },
+
+		Package(){0x0009FFFF, 0, INTB, 0 },
+		Package(){0x0009FFFF, 1, INTC, 0 },
+		Package(){0x0009FFFF, 2, INTD, 0 },
+		Package(){0x0009FFFF, 3, INTA, 0 },
+
+		Package(){0x000AFFFF, 0, INTC, 0 },
+		Package(){0x000AFFFF, 1, INTD, 0 },
+		Package(){0x000AFFFF, 2, INTA, 0 },
+		Package(){0x000AFFFF, 3, INTB, 0 },
+
+		Package(){0x000BFFFF, 0, INTD, 0 },
+		Package(){0x000BFFFF, 1, INTA, 0 },
+		Package(){0x000BFFFF, 2, INTB, 0 },
+		Package(){0x000BFFFF, 3, INTC, 0 },
+
+		Package(){0x000CFFFF, 0, INTA, 0 },
+		Package(){0x000CFFFF, 1, INTB, 0 },
+		Package(){0x000CFFFF, 2, INTC, 0 },
+		Package(){0x000CFFFF, 3, INTD, 0 },
+
 		/* Bus 0, Funct 8 - Southbridge port (normally hidden) */
 
 		/* SB devices */
 		/* Bus 0, Dev 17 - SATA controller #2 */
 		/* Bus 0, Dev 18 - SATA controller #1 */
-		Package(){0x0011FFFF, 0, INTA, 0 },
+		Package(){0x0011FFFF, 0, INTG, 0 },
 
 		/* Bus 0, Dev 19 - USB: OHCI, dev 18,19 func 0-2, dev 20 func 5;
 		 * EHCI, dev 18, 19 func 2 */
 		Package(){0x0012FFFF, 0, INTA, 0 },
 		Package(){0x0012FFFF, 1, INTB, 0 },
 		Package(){0x0012FFFF, 2, INTC, 0 },
+		Package(){0x0012FFFF, 3, INTD, 0 },
 
 		Package(){0x0013FFFF, 0, INTC, 0 },
 		Package(){0x0013FFFF, 1, INTD, 0 },
 		Package(){0x0013FFFF, 2, INTA, 0 },
+		Package(){0x0013FFFF, 3, INTB, 0 },
 
 		/* Package(){0x0014FFFF, 1, INTA, 0 }, */
 
@@ -81,6 +106,12 @@ Scope(\_SB) {
 		Package(){0x0014FFFF, 1, INTB, 0 },
 		Package(){0x0014FFFF, 2, INTC, 0 },
 		Package(){0x0014FFFF, 3, INTD, 0 },
+
+/*		Package(){0x0015FFFF, 0, INTA, 0 },
+		Package(){0x0015FFFF, 1, INTB, 0 },
+		Package(){0x0015FFFF, 2, INTC, 0 },
+		Package(){0x0015FFFF, 3, INTD, 0 },
+*/
 	})
 
 	Name(APR0, Package(){
@@ -129,11 +160,13 @@ Scope(\_SB) {
 		/* Package(){0x0009FFFF, 1, 0, 16 }, */
 		/* Package(){0x0009FFFF, 2, 0, 17 }, */
 		/* Package(){0x0009FFFF, 3, 0, 18 }, */
+
 		/* Bus 0, Dev A - PCIe Bridge for network card */
 		Package(){0x000AFFFF, 0, 0, 18 },
 		/* Package(){0x000AFFFF, 1, 0, 16 }, */
 		/* Package(){0x000AFFFF, 2, 0, 17 }, */
 		/* Package(){0x000AFFFF, 3, 0, 18 }, */
+
 		/* Bus 0, Funct 8 - Southbridge port (normally hidden) */
 
 		/* SB devices in APIC mode */
@@ -146,41 +179,34 @@ Scope(\_SB) {
 		Package(){0x0012FFFF, 0, 0, 16 },
 		Package(){0x0012FFFF, 1, 0, 17 },
 		Package(){0x0012FFFF, 2, 0, 18 },
+		Package(){0x0012FFFF, 3, 0, 19 },
 
 		Package(){0x0013FFFF, 0, 0, 18 },
 		Package(){0x0013FFFF, 1, 0, 19 },
 		Package(){0x0013FFFF, 2, 0, 16 },
-
-		/* Package(){0x00140000, 0, 0, 16 }, */
-
-		/* Package(){0x00130004, 2, 0, 18 }, */
-		/* Package(){0x00130005, 3, 0, 19 }, */
+		Package(){0x0013FFFF, 3, 0, 17 },
 
 		/* Bus 0, Dev 20 - F0:SMBus/ACPI, F1:IDE; F2:HDAudio; F3:LPC; F4:PCIBridge; F5:USB */
 		Package(){0x0014FFFF, 0, 0, 16 },
 		Package(){0x0014FFFF, 1, 0, 17 },
 		Package(){0x0014FFFF, 2, 0, 18 },
 		Package(){0x0014FFFF, 3, 0, 19 },
-		/* Package(){0x00140004, 2, 0, 18 }, */
-		/* Package(){0x00140004, 3, 0, 19 }, */
-		/* Package(){0x00140005, 1, 0, 17 }, */
-		/* Package(){0x00140006, 1, 0, 17 }, */
 	})
 
 	Name(PR1, Package(){
 		/* Internal graphics - RS780 VGA, Bus1, Dev5 */
-		Package(){0x0005FFFF, 0, INTA, 0 },
-		Package(){0x0005FFFF, 1, INTB, 0 },
-		Package(){0x0005FFFF, 2, INTC, 0 },
-		Package(){0x0005FFFF, 3, INTD, 0 },
+		Package(){0x0005FFFF, 0, INTC, 0 },
+		Package(){0x0005FFFF, 1, INTD, 0 },
+		Package(){0x0005FFFF, 2, INTA, 0 },
+		Package(){0x0005FFFF, 3, INTB, 0 },
 	})
 
 	Name(APR1, Package(){
 		/* Internal graphics - RS780 VGA, Bus1, Dev5 */
 		Package(){0x0005FFFF, 0, 0, 18 },
 		Package(){0x0005FFFF, 1, 0, 19 },
-		/* Package(){0x0005FFFF, 2, 0, 20 }, */
-		/* Package(){0x0005FFFF, 3, 0, 17 }, */
+		Package(){0x0005FFFF, 2, 0, 16 },
+		Package(){0x0005FFFF, 3, 0, 17 },
 	})
 
 	Name(PS2, Package(){
@@ -201,10 +227,10 @@ Scope(\_SB) {
 
 	Name(PS4, Package(){
 		/* PCIe slot - Hooked to PCIe slot 4 */
-		Package(){0x0000FFFF, 0, INTA, 0 },
-		Package(){0x0000FFFF, 1, INTB, 0 },
-		Package(){0x0000FFFF, 2, INTC, 0 },
-		Package(){0x0000FFFF, 3, INTD, 0 },
+		Package(){0x0000FFFF, 0, INTD, 0 },
+		Package(){0x0000FFFF, 1, INTA, 0 },
+		Package(){0x0000FFFF, 2, INTB, 0 },
+		Package(){0x0000FFFF, 3, INTC, 0 },
 	})
 
 	Name(APS4, Package(){
@@ -272,10 +298,10 @@ Scope(\_SB) {
 
 	Name(APS9, Package(){
 		/* PCIe slot - Hooked to PCIe slot 9 */
-		Package(){0x0000FFFF, 0, 0, 17 },
-		Package(){0x0000FFFF, 1, 0, 18 },
-		Package(){0x0000FFFF, 2, 0, 19 },
-		Package(){0x0000FFFF, 3, 0, 16 },
+		Package(){0x0000FFFF, 0, 0, 19 },
+		Package(){0x0000FFFF, 1, 0, 16 },
+		Package(){0x0000FFFF, 2, 0, 17 },
+		Package(){0x0000FFFF, 3, 0, 18 },
 	})
 	Name(PSa, Package(){
 		/* PCIe slot - Hooked to PCIe slot 10 */
@@ -288,9 +314,9 @@ Scope(\_SB) {
 	Name(APSa, Package(){
 		/* PCIe slot - Hooked to PCIe slot 10 */
 		Package(){0x0000FFFF, 0, 0, 18 },
-		Package(){0x0000FFFF, 1, 0, 19 },
-		Package(){0x0000FFFF, 2, 0, 16 },
-		Package(){0x0000FFFF, 3, 0, 17 },
+		Package(){0x0000FFFF, 1, 0, 16 },
+		Package(){0x0000FFFF, 2, 0, 17 },
+		Package(){0x0000FFFF, 3, 0, 18 },
 	})
 
 	Name(PCIB, Package(){