The code can run on the Mahogany board, which is one of sample boards

made by AMD. Its major features are:
 CPU:
  * AMD AM2+
  * AMD Athlon 64 x2
  * AMD Athlon 64 FX
  * AMD Athlon 64
  * AMD Sempron CPUs
 System Chipset:
  * RS780E
  * SB700
 On Board Chipset:
  * BIOS - SPI
  * Azalia CODEC - Realtek ALC888
  * LPC SuperIO - ITE8718F(GX).
  * LAN - REALTEK 8111C
  * TPM - SLB9635TT1.2
 Main Memory:
  * DDR II * 4 (Max 4GB)
 Expansion Slots:
  * PCI Express X16 slot*2 (PCI-E X8 Bus)
  * PCI Express X4 Slot*1
 Intersil PWM:
  * Controller - Intersil 6323

Note:
1. The only difference to mahogany is the CPU is changed to K8 family 10.
2. The main structure of the code is based on
   serengeti_cheetah_fam10. I am a rookie to fam10. I am still
   confused about CONFIG_HT_CHAIN_UNITID_BASE and
   CONFIG_HT_CHAIN_END_UNITID_BASE. I set them as the way dbm690t
   does.  And I have to modify the some fam10 code (see the patch
   ht_chain_unitid_base.patch). I dont know how to solve this. Please
   help.
   Updated findings: In h3finit.c, the code goes the AMD_CB_ManualBUIDSwapList().
   The swaplist is {0x00, 0x00, 0xFF, 0x00, 0xFF}. I am trying to find the meaning
   of the list. The amdht wrapper needs to modify definitely.
3. With fam10 processor, the HT link can work in HT3.
4. The ACPI _PSS table is set staticly. The auto configuaration
   process doesnt seem to work correctly.
5. Currently the fam10 code in coreboot doesn't support DDR3. If you
   happen to get a board with DDR3 and you don't have the patience to wait,
   please find another board with DDR2.
6. It will take "Uncompressing image to RAM" about 1 minute. I know it is a
   issue for a long time. I disable the compressing currently. When the problem
   is fixed, we can re-enable it.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5221 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 93 insertions, 0 deletions

diff --git a/src/mainboard/amd/mahogany_fam10/acpi/statdef.asl b/src/mainboard/amd/mahogany_fam10/acpi/statdef.asl
new file mode 100644
index 0000000000..a68a5794b9
--- /dev/null
+++ b/src/mainboard/amd/mahogany_fam10/acpi/statdef.asl
@@ -0,0 +1,93 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+
+/* Status and notification definitions */
+
+#define STA_MISSING			    0x00
+#define STA_PRESENT			    0x01
+#define	STA_ENABLED			    0x03
+#define STA_DISABLED		    0x09
+#define	STA_INVISIBLE		    0x0B
+#define	STA_UNAVAILABLE		    0x0D
+#define	STA_VISIBLE			    0x0F
+
+/* SMBus status codes */
+#define SMB_OK                  0x00
+#define SMB_UnknownFail         0x07
+#define SMB_DevAddrNAK          0x10
+#define SMB_DeviceError         0x11
+#define SMB_DevCmdDenied        0x12
+#define SMB_UnknownErr          0x13
+#define SMB_DevAccDenied        0x17
+#define SMB_Timeout             0x18
+#define SMB_HstUnsuppProtocol   0x19
+#define SMB_Busy                0x1A
+#define SMB_PktChkError         0x1F
+
+/* Device Object Notification Values */
+#define	NOTIFY_BUS_CHECK		0x00
+#define	NOTIFY_DEVICE_CHECK		0x01
+#define	NOTIFY_DEVICE_WAKE		0x02
+#define	NOTIFY_EJECT_REQUEST	0x03
+#define	NOTIFY_DEVICE_CHECK_JR	0x04
+#define	NOTIFY_FREQUENCY_ERROR	0x05
+#define	NOTIFY_BUS_MODE			0x06
+#define	NOTIFY_POWER_FAULT		0x07
+#define	NOTIFY_CAPABILITIES		0x08
+#define	NOTIFY_PLD_CHECK		0x09
+#define	NOTIFY_SLIT_UPDATE		0x0B
+
+/* Battery Device Notification Values */
+#define	NOTIFY_BAT_STATUSCHG	0x80
+#define	NOTIFY_BAT_INFOCHG  	0x81
+#define	NOTIFY_BAT_MAINTDATA    0x82
+
+/* Power Source Object Notification Values */
+#define	NOTIFY_PWR_STATUSCHG	0x80
+
+/* Thermal Zone Object Notification Values */
+#define	NOTIFY_TZ_STATUSCHG	    0x80
+#define	NOTIFY_TZ_TRIPPTCHG	    0x81
+#define	NOTIFY_TZ_DEVLISTCHG	0x82
+#define	NOTIFY_TZ_RELTBLCHG 	0x83
+
+/* Power Button Notification Values */
+#define	NOTIFY_POWER_BUTTON		0x80
+
+/* Sleep Button Notification Values */
+#define	NOTIFY_SLEEP_BUTTON		0x80
+
+/* Lid Notification Values */
+#define	NOTIFY_LID_STATUSCHG	0x80
+
+/* Processor Device Notification Values */
+#define	NOTIFY_CPU_PPCCHG   	0x80
+#define	NOTIFY_CPU_CSTATECHG  	0x81
+#define	NOTIFY_CPU_THROTLCHG    0x82
+
+/* User Presence Device Notification Values */
+#define	NOTIFY_USR_PRESNCECHG	0x80
+
+/* Battery Device Notification Values */
+#define	NOTIFY_ALS_ILLUMCHG 	0x80
+#define	NOTIFY_ALS_COLORTMPCHG 	0x81
+#define	NOTIFY_ALS_RESPCHG      0x82
+
+