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authorKarthikeyan Ramasubramanian <kramasub@google.com>2020-08-06 22:58:08 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-08-17 06:37:26 +0000
commit8beb5ba230ff30126fcc169a11d1b3291c4fe9dc (patch)
treee162e2de8ba0431c843259f1e1f18bc19618c739 /src/mainboard/amd/gardenia/acpi
parent2a66dd2cc2dc821b5724c28eb8df81fa60486e16 (diff)
mb/intel/jasperlake_rvp: Re-organize the FMAP layout
More space is required in the COREBOOT CBFS to accommodate some features. Currently no alternate firmware is stuffed into RW_LEGACY CBFS and has ~1 MB of unused space. Borrow some space from RW_LEGACY CBFS and extend the RO_SECTION. Even within RO_SECTION, GBB requires only 12 KiB. So adjust the GBB region accordingly and extend the COREBOOT CBFS. BUG=b:162159386 TEST=Build the JSLRVP mainboard. Change-Id: Ia8bb381c31ddf76f3211f9d4ac5c8c18c27834b7 Signed-off-by: Karthikeyan Ramasubramanain <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44283 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
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