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authorSubrata Banik <subrata.banik@intel.com>2018-02-19 13:43:56 +0530
committerPatrick Georgi <pgeorgi@google.com>2018-02-22 09:55:50 +0000
commit736a03fd248174ef27d0b5b9adffc8970cee4c14 (patch)
treee1195c044dfa626e97394bb47bb46027479cb390 /src/mainboard/amd/gardenia/Kconfig
parent5f1da55b49ab99c59acdafadb37476ad84475745 (diff)
soc/intel/common/block/pcr: Add function for executing PCH SBI message
This function performs SBI communication Input: * PID: Port ID of the SBI message * Offset: Register offset of the SBI message * Opcode: Opcode * Posted: Posted message * Fast_Byte_Enable: First Byte Enable * BAR: base address * FID: Function ID * Data: Read/Write Data * Response: Response Output: * 0: SBI message is successfully completed * -1: SBI message failure Change-Id: I4e49311564e20cedbfabaaceaf5f72c480e5ea26 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/23809 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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