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| author | Fred Reitberger <reitbergerfred@gmail.com> | 2022-01-28 14:46:09 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-13 21:22:52 +0000 |
| commit | 28894c57988076688395c8a122d79640a3702d1a (patch) | |
| tree | 70de84812dbc772755209db7ec830b7ed9045dc5 /src/mainboard/amd/chausie/mainboard.c | |
| parent | 399d3cf8782673bb1cf62bca028d43eb95cc5f6e (diff) | |
mb/amd/chausie: update GPIO for chausie
Add/update initial GPIO pin descriptions and initialization types for
chausie mainboard.
Change-Id: I14ea0e1086f626398a867896ee81ce07cf530182
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61461
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/amd/chausie/mainboard.c')
| -rw-r--r-- | src/mainboard/amd/chausie/mainboard.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/amd/chausie/mainboard.c b/src/mainboard/amd/chausie/mainboard.c index 25991f1850..2966b554b3 100644 --- a/src/mainboard/amd/chausie/mainboard.c +++ b/src/mainboard/amd/chausie/mainboard.c @@ -6,6 +6,7 @@ #include <soc/acpi.h> #include <string.h> #include <types.h> +#include "gpio.h" /* * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. @@ -87,6 +88,7 @@ static void pirq_setup(void) static void mainboard_init(void *chip_info) { + mainboard_program_gpios(); } static void mainboard_enable(struct device *dev) |