From 28894c57988076688395c8a122d79640a3702d1a Mon Sep 17 00:00:00 2001
From: Fred Reitberger <reitbergerfred@gmail.com>
Date: Fri, 28 Jan 2022 14:46:09 -0500
Subject: mb/amd/chausie: update GPIO for chausie

Add/update initial GPIO pin descriptions and initialization types for
chausie mainboard.

Change-Id: I14ea0e1086f626398a867896ee81ce07cf530182
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61461
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/mainboard/amd/chausie/mainboard.c | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/mainboard/amd/chausie/mainboard.c')

diff --git a/src/mainboard/amd/chausie/mainboard.c b/src/mainboard/amd/chausie/mainboard.c
index 25991f1850..2966b554b3 100644
--- a/src/mainboard/amd/chausie/mainboard.c
+++ b/src/mainboard/amd/chausie/mainboard.c
@@ -6,6 +6,7 @@
 #include <soc/acpi.h>
 #include <string.h>
 #include <types.h>
+#include "gpio.h"
 
 /*
  * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.
@@ -87,6 +88,7 @@ static void pirq_setup(void)
 
 static void mainboard_init(void *chip_info)
 {
+	mainboard_program_gpios();
 }
 
 static void mainboard_enable(struct device *dev)
-- 
cgit v1.2.3