diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-01-11 16:22:35 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-25 03:19:15 +0000 |
| commit | a8d7c043f67aee61280b3851e938f2c1de252f06 (patch) | |
| tree | e278a155f6b2e5362c26c21533fbabe29fb5ae98 /src/mainboard/amd/chausie/Kconfig | |
| parent | 421c7d1a9904f1f74d017c053da9cc4a4e1586aa (diff) | |
mb/amd/chausie: add mainboard as copy of mb/amd/majolica
To have the new AMD Sabrina SoC code tested, add the AMD Chausie
mainboard as a copy of Majolica. This patch also changes the name from
Majolica to Chausie, selects the Sabrina SoC instead of the Cezanne SoC
and comments out the APCB_SOURCES since those aren't available in the
3rdparty/blobs repository yet.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic7b18f7a6ae5b8365234dd1227e0b1f7f37279da
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61079
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/amd/chausie/Kconfig')
| -rw-r--r-- | src/mainboard/amd/chausie/Kconfig | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/src/mainboard/amd/chausie/Kconfig b/src/mainboard/amd/chausie/Kconfig new file mode 100644 index 0000000000..dc6e090bce --- /dev/null +++ b/src/mainboard/amd/chausie/Kconfig @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: GPL-2.0-only + +if BOARD_AMD_CHAUSIE + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_16384 + select HAVE_ACPI_RESUME + select SOC_AMD_SABRINA + select SOC_AMD_COMMON_BLOCK_USE_ESPI + select AMD_SOC_CONSOLE_UART + select MAINBOARD_HAS_CHROMEOS + +config FMDFILE + default "src/mainboard/amd/chausie/chromeos.fmd" if CHROMEOS + default "src/mainboard/amd/chausie/board.fmd" + +config MAINBOARD_DIR + default "amd/chausie" + +config MAINBOARD_PART_NUMBER + default "CHAUSIE" + +config AMD_FWM_POSITION_INDEX + int + default 3 if CHROMEOS + default 4 + help + TODO: might need to be adapted for better placement of files in cbfs + +config CHAUSIE_HAVE_MCHP_FW + bool "Have Microchip EC firmware?" + default n + +config CHAUSIE_MCHP_FW_FILE + string + depends on CHAUSIE_HAVE_MCHP_FW + default "3rdparty/blobs/mainboard/amd/chausie/EC_chausie.bin" + help + The EC firmware blob is usually the first 128kByte of the stock + firmware image. + +config VBOOT + select VBOOT_NO_BOARD_SUPPORT + select VBOOT_SEPARATE_VERSTAGE + select VBOOT_STARTS_IN_BOOTBLOCK + +config VBOOT_VBNV_OFFSET + hex + default 0x2A + +config CHROMEOS + # Use default libpayload config + select LP_DEFCONFIG_OVERRIDE if PAYLOAD_DEPTHCHARGE + +if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig +config EFS_SPI_READ_MODE + default 3 # Quad IO (1-1-4) + +config EFS_SPI_SPEED + default 0 # 66MHz + +config EFS_SPI_MICRON_FLAG + default 0 + +config NORMAL_READ_SPI_SPEED + default 1 # 33MHz + +config ALT_SPI_SPEED + default 1 # 33MHz + +config TPM_SPI_SPEED + default 1 # 33MHz + +endif # !EM100 + +endif # BOARD_AMD_CHAUSIE |