diff options
| author | Zheng Bao <zheng.bao@amd.com> | 2011-01-18 09:31:29 +0000 |
|---|---|---|
| committer | Zheng Bao <Zheng.Bao@amd.com> | 2011-01-18 09:31:29 +0000 |
| commit | 078efb5a6fed4fe059af63f3f7d9844c52841cf3 (patch) | |
| tree | e991c4a8673d9467a2f303b1cc53ba960e935d83 /src/mainboard/amd/bimini_fam10/Kconfig | |
| parent | 10219012f29692c7860e505cf2d71004ba82c1f3 (diff) | |
remove the code which is not ready to release.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6262 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/bimini_fam10/Kconfig')
| -rw-r--r-- | src/mainboard/amd/bimini_fam10/Kconfig | 108 |
1 files changed, 0 insertions, 108 deletions
diff --git a/src/mainboard/amd/bimini_fam10/Kconfig b/src/mainboard/amd/bimini_fam10/Kconfig deleted file mode 100644 index 8d675e9fa5..0000000000 --- a/src/mainboard/amd/bimini_fam10/Kconfig +++ /dev/null @@ -1,108 +0,0 @@ -if BOARD_AMD_BIMINI_FAM10 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select ARCH_X86 - select CPU_AMD_SOCKET_ASB2 - select DIMM_DDR3 - select DIMM_REGISTERED - # TODO: Enable QRANK_DIMM_SUPPORT? Was commented in the Kconfig file, - # but enabled in the romstage.c file. - select QRANK_DIMM_SUPPORT - select NORTHBRIDGE_AMD_AMDFAM10 - select SOUTHBRIDGE_AMD_RS780 - select SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800 - select SUPERIO_ITE_IT8718F - select BOARD_HAS_FADT - select HAVE_BUS_CONFIG - select HAVE_OPTION_TABLE - select HAVE_PIRQ_TABLE - select HAVE_MP_TABLE - select HAVE_MAINBOARD_RESOURCES - select HAVE_HARD_RESET - select SB_HT_CHAIN_UNITID_OFFSET_ONLY - select LIFT_BSP_APIC_ID - select SERIAL_CPU_INIT - select AMDMCT - select HAVE_ACPI_TABLES - select BOARD_ROMSIZE_KB_2048 - select RAMINIT_SYSINFO - select ENABLE_APIC_EXT_ID - select TINY_BOOTBLOCK - select GFXUMA - select HAVE_DEBUG_CAR - select SET_FIDVID - -config MAINBOARD_DIR - string - default amd/bimini_fam10 - -config APIC_ID_OFFSET - hex - default 0x0 - -config MAINBOARD_PART_NUMBER - string - default "Bimini (Fam10)" - -config HW_MEM_HOLE_SIZEK - hex - default 0x100000 - -config MAX_CPUS - int - default 8 - -config MAX_PHYSICAL_CPUS - int - default 2 - -config HW_MEM_HOLE_SIZE_AUTO_INC - bool - default n - -config MEM_TRAIN_SEQ - int - default 2 - -config SB_HT_CHAIN_ON_BUS0 - int - default 1 - -config HT_CHAIN_END_UNITID_BASE - hex - default 0x1 - -config HT_CHAIN_UNITID_BASE - hex - default 0x0 - -config IRQ_SLOT_COUNT - int - default 11 - -config AMD_UCODE_PATCH_FILE - string - default "mc_patch_010000b6.h" - -config RAMTOP - hex - default 0x2000000 - -config HEAP_SIZE - hex - default 0xc0000 - -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x3060 - -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x1022 - -config RAMBASE - hex - default 0x200000 - -endif #BOARD_AMD_BIMINI_FAM10 |