aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/amd/bettong/boardid.c
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2020-03-10 21:33:57 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-11 14:26:35 +0000
commit3002eb42ed5e844ac6e3967ca0f66e3ae1a9e74d (patch)
tree1b5124e8bf39ecec1ed2fa28d816c5f18d6d52f9 /src/mainboard/amd/bettong/boardid.c
parentf4cfefe78895a445ec8d65176e67f5fcacdfac99 (diff)
mb/amd/bettong: Drop unmaintained ROMCC board
Remove unmaintained and unsupported old ROMCC board. This board wasn't hooked up for build. Change-Id: I1bce09ba5041a6636f900de611846467653f35a9 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39069 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/amd/bettong/boardid.c')
-rw-r--r--src/mainboard/amd/bettong/boardid.c48
1 files changed, 0 insertions, 48 deletions
diff --git a/src/mainboard/amd/bettong/boardid.c b/src/mainboard/amd/bettong/boardid.c
deleted file mode 100644
index 21d0476204..0000000000
--- a/src/mainboard/amd/bettong/boardid.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <amdblocks/acpimmio.h>
-#include <device/mmio.h>
-#include <southbridge/amd/common/amd_defs.h>
-#include <boardid.h>
-
-/**
- *Bettong uses 3 GPIO(5-7) pins to identify board.
- *The GPIO ports are mapped to MMIO space.
- *The GPIO value and board version are mapped as follow:
- *GPIO5 GPIO6 GPIO7 Version
- * 0 0 0 A
- * 0 0 1 B
- * ......
- * 1 1 1 H
- */
-uint32_t board_id(void)
-{
- u8 value = 0;
- u8 boardrev = 0;
- char boardid;
-
- value = gpio0_read8((7 << 2) + 2); /* agpio7: board_id2 */
- boardrev = value & 1;
- value = gpio0_read8((6 << 2) + 2); /* agpio6: board_id1 */
- boardrev |= (value & 1) << 1;
- value = gpio0_read8((5 << 2) + 2); /* agpio5: board_id0 */
- boardrev |= (value & 1) << 2;
-
- boardid = 'A' + boardrev;
-
- return boardid;
-}