summaryrefslogtreecommitdiff
path: root/src/mainboard/acer
diff options
context:
space:
mode:
authorJoey Peng <joey.peng@lcfc.corp-partner.google.com>2023-06-17 09:30:04 +0800
committerNick Vaccaro <nvaccaro@google.com>2023-07-18 19:08:34 +0000
commitcd1006cb0e721193ad35274339aa0c8bca438e7d (patch)
treedd48a63cfc773559c33416d16c0e6626bbc82c72 /src/mainboard/acer
parent41b92fef8104354dcaf90a1b9d8eb66ec11b7b6a (diff)
mb/google/brya/var/taeko: Enable CsPiStartHighinEct
Enable CsPiStartHighinEct to fix MRC Cache fail issue BUG=b:279835630 BRANCH=none TEST=Pass MRC Cache test with toolkit 1000 times Change-Id: I25cd856785bab9c661e30e2987b43f0dc2ba9564 Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76544 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/acer')
0 files changed, 0 insertions, 0 deletions