soc/intel/common: Add support for CSE IOM/NPHY sub-parition update

This patch adds the following support to coreboot
1. Kconfig to add IOM/NPHY in the COREBOOT/FW_MAIN_A/FW_MAIN_B
partition of BIOS
2. Helper functions to support update.

Pre-requisites to enable IOM/NPHY FW Update:
1. NPHY and IOM blobs have to be added to added COREBOOT, FW_MAIN_A and
   FW_MAIN_B through board configuration files.
   CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE: IOM blob Path
   SOC_INTEL_CSE_NPHY_CBFS_FILE: NPHY blob path

2. Enable CONFIG_CSE_SUB_PARTITION_UPDATE to enable CSE sub-partition
   NPHY/IOM update.

coreboot follows below procedure to update NPHY and IOM:
NPHY Update:
1. coreboot will navigate through the CSE region,
   identify the CSE’s NPHY FW version and BIOS NPHY version.
2. Compare both versions, if there is a difference, CSE will trigger an
   NPHY FW update. Otherwise, skips the NPHY FW update.

IOM Update:
1. coreboot will navigate through the CSE region, identify CSE's IOM
    FW version and BIOS IOM version.
2. Compares both versions, if there is a difference, coreboot will
   trigger an IOM FW update.Otherwise, skip IOM FW update.

Before coreboot triggers update of NPHY/IOM, BIOS sends SET BOOT
PARTITION INFO(RO) to CSE and issues GLOBAL RESET commands if CSE
boots from RW. coreboot updates CSE's NPHY and IOM sub-partition only
if CSE boots from CSE RO Boot partition.

Once CSE boots from RO, BIOS sends HMRFPO command to CSE, then
triggers update of NPHY and IOM FW in the CSE Region(RO and RW).

coreboot triggers NPHY/IOM update procedure in all ChromeOS boot
modes(Normal and Recovery).

BUG=b:202143532
BRANCH=None
TEST=Build and verify CSE sub-partitions IOM and NPHY are getting
updated with CBFS IOM and NPHY blobs.
Verified TBT, type-C display, NVMe, SD card, WWAN, Wifi working after
the update.

Change-Id: I7c0cda51314c4f722f5432486a43e19b46f4b240
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

0 files changed, 0 insertions, 0 deletions