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authorBenjamin Doron <benjamin.doron00@gmail.com>2019-09-22 17:33:12 +1000
committerMartin Roth <martinroth@google.com>2022-01-28 16:44:41 +0000
commit289a67d1600d98593d6f417eac76e836d6dcbecd (patch)
tree3096c0e9d27ae2d6eea753a7402ecea14b5c839e /src/mainboard/acer/aspire_vn7_572g/include
parentad3828e3ce5f19776a94bd0e49057d89802f4203 (diff)
mb/acer: Add Acer Aspire VN7-572G
Add initial support for Acer Aspire VN7-572G (Skylake-U). Also note that there are two similar boards, Aspire VN7-792G and Aspire VN7-592G; both are Skylake-H. These are not supported (yet). Do not flash images intended for Aspire VN7-572G on those boards: the GPIOs and HSIO routing will be different and may risk damage to the hardware. Working: - Payload - TianoCore (custom fork of MrChromebox's UefiPayloadPkg; edk2-202102) - OS - Fedora 35 (kernel 5.14.15) - Windows 10 20H1 (bugs present: battery paging fixed; abandoning testing) - Both DIMM slots - eDP and HDMI display (VBT partially matches vendor's configuration) - with FSP GOP - with IntelGopDriver (in payload: TianoCore) - with libgfxinit - Audio - Speakers and headphone jack - Internal microphone - HDMI audio - Devices - PCIe and SATA (unable to test M.2 SATA) - Discrete graphics, Ethernet and WiFi - USB ports (unable to test type-C, touchscreen and fingerprint reader) - Includes internal devices (Bluetooth, SD card reader and webcam) - TPM - Keyboard and touchpad - Optimus (see CB:28380, CB:40625 and CB:40628) - ACPI functionality - S3 suspend and resume - EC support - Internal flashing with flashrom - CMOS settings In progress: - EC SMM functionality Not working: - vboot (breaks boot): See CB:58249 Notes: - `tpm2_pcrallocate` to enable SHA256 PCR bank Not implemented: - WMI Change-Id: I6340116abfeb2fbd280d143b74d323e4da3566f6 Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35523 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/acer/aspire_vn7_572g/include')
-rw-r--r--src/mainboard/acer/aspire_vn7_572g/include/ec.h14
-rw-r--r--src/mainboard/acer/aspire_vn7_572g/include/gpio.h8
2 files changed, 22 insertions, 0 deletions
diff --git a/src/mainboard/acer/aspire_vn7_572g/include/ec.h b/src/mainboard/acer/aspire_vn7_572g/include/ec.h
new file mode 100644
index 0000000000..49651decfb
--- /dev/null
+++ b/src/mainboard/acer/aspire_vn7_572g/include/ec.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef MAINBOARD_EC_H
+#define MAINBOARD_EC_H
+
+uint8_t ec_cmd_90_read(uint8_t addr);
+void ec_cmd_91_write(uint8_t addr, uint8_t data);
+uint8_t ec_cmd_94_query(void);
+uint8_t ec_idx_read(uint16_t addr);
+void ec_idx_write(uint16_t addr, uint8_t data);
+/* TODO: Check if ADC is valid. */
+uint16_t read_ec_adc_converter(uint8_t adc);
+
+#endif
diff --git a/src/mainboard/acer/aspire_vn7_572g/include/gpio.h b/src/mainboard/acer/aspire_vn7_572g/include/gpio.h
new file mode 100644
index 0000000000..ed8518ed64
--- /dev/null
+++ b/src/mainboard/acer/aspire_vn7_572g/include/gpio.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef MAINBOARD_GPIO_H
+#define MAINBOARD_GPIO_H
+
+void mainboard_config_stage_gpios(void);
+
+#endif