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authorBenjamin Doron <benjamin.doron00@gmail.com>2019-09-22 17:33:12 +1000
committerMartin Roth <martinroth@google.com>2022-01-28 16:44:41 +0000
commit289a67d1600d98593d6f417eac76e836d6dcbecd (patch)
tree3096c0e9d27ae2d6eea753a7402ecea14b5c839e /src/mainboard/acer/aspire_vn7_572g/acpi
parentad3828e3ce5f19776a94bd0e49057d89802f4203 (diff)
mb/acer: Add Acer Aspire VN7-572G
Add initial support for Acer Aspire VN7-572G (Skylake-U). Also note that there are two similar boards, Aspire VN7-792G and Aspire VN7-592G; both are Skylake-H. These are not supported (yet). Do not flash images intended for Aspire VN7-572G on those boards: the GPIOs and HSIO routing will be different and may risk damage to the hardware. Working: - Payload - TianoCore (custom fork of MrChromebox's UefiPayloadPkg; edk2-202102) - OS - Fedora 35 (kernel 5.14.15) - Windows 10 20H1 (bugs present: battery paging fixed; abandoning testing) - Both DIMM slots - eDP and HDMI display (VBT partially matches vendor's configuration) - with FSP GOP - with IntelGopDriver (in payload: TianoCore) - with libgfxinit - Audio - Speakers and headphone jack - Internal microphone - HDMI audio - Devices - PCIe and SATA (unable to test M.2 SATA) - Discrete graphics, Ethernet and WiFi - USB ports (unable to test type-C, touchscreen and fingerprint reader) - Includes internal devices (Bluetooth, SD card reader and webcam) - TPM - Keyboard and touchpad - Optimus (see CB:28380, CB:40625 and CB:40628) - ACPI functionality - S3 suspend and resume - EC support - Internal flashing with flashrom - CMOS settings In progress: - EC SMM functionality Not working: - vboot (breaks boot): See CB:58249 Notes: - `tpm2_pcrallocate` to enable SHA256 PCR bank Not implemented: - WMI Change-Id: I6340116abfeb2fbd280d143b74d323e4da3566f6 Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35523 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/acer/aspire_vn7_572g/acpi')
-rw-r--r--src/mainboard/acer/aspire_vn7_572g/acpi/ac.asl16
-rw-r--r--src/mainboard/acer/aspire_vn7_572g/acpi/battery.asl416
-rw-r--r--src/mainboard/acer/aspire_vn7_572g/acpi/brightness_levels.asl113
-rw-r--r--src/mainboard/acer/aspire_vn7_572g/acpi/ec.asl422
-rw-r--r--src/mainboard/acer/aspire_vn7_572g/acpi/mainboard.asl83
-rw-r--r--src/mainboard/acer/aspire_vn7_572g/acpi/superio.asl3
-rw-r--r--src/mainboard/acer/aspire_vn7_572g/acpi/thermal.asl121
7 files changed, 1174 insertions, 0 deletions
diff --git a/src/mainboard/acer/aspire_vn7_572g/acpi/ac.asl b/src/mainboard/acer/aspire_vn7_572g/acpi/ac.asl
new file mode 100644
index 0000000000..c92cbd9c76
--- /dev/null
+++ b/src/mainboard/acer/aspire_vn7_572g/acpi/ac.asl
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+Device (ADP1)
+{
+ Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID
+ Name (_PCL, Package () { \_SB }) // _PCL: Power Consumer List
+
+ Method (_PSR, 0, NotSerialized) // _PSR: Power Source
+ {
+#if CONFIG(EC_USE_LGMR)
+ Return (MACS)
+#else
+ Return (EACS)
+#endif
+ }
+}
diff --git a/src/mainboard/acer/aspire_vn7_572g/acpi/battery.asl b/src/mainboard/acer/aspire_vn7_572g/acpi/battery.asl
new file mode 100644
index 0000000000..1f4fb47ba5
--- /dev/null
+++ b/src/mainboard/acer/aspire_vn7_572g/acpi/battery.asl
@@ -0,0 +1,416 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#if !CONFIG(EC_USE_LGMR)
+/* TODO: Consider actually enforcing mutex? */
+Mutex (BMTX, 0)
+#endif
+Name (B0ST, 0) /* Battery 0 status */
+
+/*
+ * EC Registers
+ *
+ * "EBID" is the battery page selector.
+ *
+ *
+ * Data on the 128 bits following offset
+ * 0xE0 is accessed in the following order:
+ *
+ * Information:
+ * Page 0: EBCM # start on page 0 #
+ * Page 0: EBFC
+ * Page 1: EBDC # switch to page 1 #
+ * Page 1: EBDV
+ * Page 1: EBSN
+ * Page 3: EBDN # switch to page 3 #
+ * Page 4: EBCH # switch to page 4 #
+ * Page 2: EBMN # switch to page 2 #
+ *
+ * Status:
+ * Page 0: EBAC # start on page 0 #
+ * Page 0: EBRC
+ * Page 0: EBFC
+ * Page 0: EBVO
+ */
+/* Page 0 */
+Field (RAM, ByteAcc, Lock, Preserve)
+{
+ Offset (0xE0),
+ EBRC, 16, /* Battery remaining capacity */
+ EBFC, 16, /* Battery full charge capacity */
+ EBPE, 16,
+ EBAC, 16, /* Battery present rate */
+ EBVO, 16, /* Battery voltage */
+ , 15,
+ EBCM, 1, /* Battery charging */
+ EBCU, 16,
+ EBTV, 16,
+}
+
+/* Page 1 */
+Field (RAM, ByteAcc, Lock, Preserve)
+{
+ Offset (0xE0),
+ EBDC, 16, /* Battery design capacity */
+ EBDV, 16, /* Battery design voltage */
+ EBSN, 16, /* Battery serial number */
+}
+
+/* Page 2 */
+Field (RAM, ByteAcc, NoLock, Preserve)
+{
+ Offset (0xE0),
+ EBMN, 128, /* Battery manufacturer */
+}
+
+/* Page 3 */
+Field (RAM, ByteAcc, NoLock, Preserve)
+{
+ Offset (0xE0),
+ EBDN, 128, /* Battery model */
+}
+
+/* Page 4 */
+Field (RAM, ByteAcc, NoLock, Preserve)
+{
+ Offset (0xE0),
+ EBCH, 128, /* Battery type */
+}
+
+#if CONFIG(EC_USE_LGMR)
+OperationRegion (MBB0, SystemMemory, (LGMR + 0x80), 0xFF)
+Field (MBB0, ByteAcc, Lock, Preserve)
+{
+ MBRC, 16,
+ MBFC, 16,
+ MBPE, 16,
+ MBAC, 16,
+ MBVO, 16,
+ , 15,
+ MBCM, 1,
+ MBCU, 16,
+ MBTV, 16,
+}
+
+Field (MBB0, ByteAcc, Lock, Preserve)
+{
+ Offset (0x10),
+ MBDC, 16,
+ MBDV, 16,
+ MBSN, 16,
+}
+
+Field (MBB0, ByteAcc, Lock, Preserve)
+{
+ Offset (0x40),
+ MBMN, 128,
+}
+
+Field (MBB0, ByteAcc, Lock, Preserve)
+{
+ Offset (0x50),
+ MBDN, 256,
+}
+
+Field (MBB0, ByteAcc, Lock, Preserve)
+{
+ Offset (0x70),
+ MBCH, 128,
+}
+#endif
+
+/*
+ * Arg0: Battery number
+ * Arg1: Battery Information Package
+ * Arg2: Status
+ */
+#if !CONFIG(EC_USE_LGMR)
+Method (GBIF, 3, Serialized)
+{
+ Acquire (BMTX, 0xFFFF) // Due to EC paging, don't run this with another function
+#else
+Method (GBIF, 3, NotSerialized)
+{
+#endif
+ If (Arg2)
+ {
+ Arg1[1] = 0xFFFFFFFF
+ Arg1[2] = 0xFFFFFFFF
+ Arg1[4] = 0xFFFFFFFF
+ Arg1[5] = 0
+ Arg1[6] = 0
+ }
+ Else
+ {
+#if CONFIG(EC_USE_LGMR)
+ Local0 = MBCM
+#else
+ EBID = 0 // We don't know which page was active
+ Local0 = EBCM
+#endif
+ Arg1[0] = (Local0 ^ 1)
+
+#if CONFIG(EC_USE_LGMR)
+ Local2 = MBFC
+ Local1 = MBDC
+#else
+ Local2 = EBFC
+ EBID = 1
+ Local1 = EBDC
+#endif
+ If (Local0)
+ {
+ Local2 *= 10
+ Local1 *= 10
+ }
+
+ Arg1[1] = Local1 // Design capacity
+ Arg1[2] = Local2 // Last full charge capacity
+#if CONFIG(EC_USE_LGMR)
+ Arg1[4] = MBDV // Design voltage
+#else
+ Arg1[4] = EBDV // Design voltage
+#endif
+ Local6 = (Local2 / 100) // Warning capacities; Remainders ignored
+ Arg1[5] = (Local6 * 7) /* Low: 7% */
+ Arg1[6] = ((Local6 * 11) / 2) /* Very low: 5.5% */
+#if CONFIG(EC_USE_LGMR)
+ Local7 = MBSN
+#else
+ Local7 = EBSN
+#endif
+ Name (SERN, Buffer (0x06) { " " })
+ /*
+ * Convert hex to decimal.
+ * - There appears to be a bug in the vendor's implementation:
+ * The correct answer has, or can have, 5 digits, so Local6 = 5.
+ * Also see "SERN" buffer.
+ * - Userspace prints reversed serial number?
+ */
+ Local6 = 4
+ While (Local7)
+ {
+ Divide (Local7, 10, Local5, Local7)
+ SERN[Local6] = (Local5 + 0x30) // Add 0x30 to get numeric ASCII
+ Local6--
+ }
+
+ Arg1[10] = SERN // Serial number
+#if CONFIG(EC_USE_LGMR)
+ Arg1[9] = MBDN // Model number
+ Arg1[11] = MBCH // Battery type
+ Arg1[12] = MBMN // OEM information
+#else
+ EBID = 3
+ Arg1[9] = EBDN // Model number
+ EBID = 4
+ Arg1[11] = EBCH // Battery type
+ EBID = 2
+ Arg1[12] = EBMN // OEM information
+#endif
+ }
+
+#if !CONFIG(EC_USE_LGMR)
+ Release (BMTX)
+#endif
+ Return (Arg1)
+}
+
+/*
+ * Arg0: Battery number
+ * Arg1: State information
+ * Arg2: Power units
+ * Arg3: Battery Status Package
+ */
+Method (GBST, 4, NotSerialized) // All on one page
+{
+#if !CONFIG(EC_USE_LGMR)
+ Acquire (BMTX, 0xFFFF) // Due to EC paging, don't run this with another function
+#endif
+ If (Arg1 & 0x02) // BIT1 in "MB0S/EB0S"
+ {
+ Local0 = 2
+ If (Arg1 & 0x20) // "EB0F"
+ {
+ Local0 = 0
+ }
+ }
+ ElseIf (Arg1 & 0x04) // BIT2 in "MB0S/EB0S"
+ {
+ Local0 = 1
+ }
+ Else
+ {
+ Local0 = 0
+ }
+
+ If (Arg1 & 0x10) // "EB0L"
+ {
+ Local0 |= 0x04
+ }
+
+ If (Arg1 & 0x01) // "EB0A"
+ {
+ /*
+ * Present rate is a 16bit signed int, positive while charging
+ * and negative while discharging.
+ */
+#if CONFIG(EC_USE_LGMR)
+ Local1 = MBAC
+ Local2 = MBRC
+ If (MACS) // Charging
+#else
+ EBID = 0 // We don't know which page was active
+ Local1 = EBAC
+ Local2 = EBRC
+ If (EACS) // Charging
+#endif
+ {
+ If (Arg1 & 0x20) // "EB0F"
+ {
+#if CONFIG(EC_USE_LGMR)
+ Local2 = MBFC
+#else
+ Local2 = EBFC
+#endif
+ }
+ }
+
+ If (Arg2)
+ {
+ Local2 *= 10
+ }
+
+#if CONFIG(EC_USE_LGMR)
+ Local3 = MBVO
+#else
+ Local3 = EBVO
+#endif
+ /*
+ * The present rate value should be positive unless discharging. If so,
+ * negate present rate.
+ */
+ If (Local1 >= 0x8000)
+ {
+ If (Local0 & 0x01)
+ {
+ Local1 = (0x00010000 - Local1)
+ }
+ Else
+ {
+ Local1 = 0 // Full battery, force to 0
+ }
+ }
+ /*
+ * If that was not the case, we have an EC bug or inconsistency
+ * and force the value to 0.
+ */
+ ElseIf ((Local0 & 0x02) == 0)
+ {
+ Local1 = 0
+ }
+
+ If (Arg2)
+ {
+ Local1 *= Local3
+ Local1 /= 1000 /* Remainder ignored by vendor */
+ }
+ }
+ Else
+ {
+ Local0 = 0
+ Local1 = 0xFFFFFFFF
+ Local2 = 0xFFFFFFFF
+ Local3 = 0xFFFFFFFF
+ }
+
+ Arg3[0] = Local0
+ Arg3[1] = Local1
+ Arg3[2] = Local2
+ Arg3[3] = Local3
+
+#if !CONFIG(EC_USE_LGMR)
+ Release (BMTX)
+#endif
+ Return (Arg3)
+}
+
+Device (BAT0)
+{
+ Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID
+ Name (_UID, 0) // _UID: Unique ID
+ Name (_PCL, Package () { \_SB }) // _PCL: Power Consumer List
+
+ Name (B0IP, Package (0x0D)
+ {
+ 1, /* 0x00: Power Unit: mAh */
+ 0xFFFFFFFF, /* 0x01: Design Capacity */
+ 0xFFFFFFFF, /* 0x02: Last Full Charge Capacity */
+ 1, /* 0x03: Battery Technology: Rechargeable */
+ 0xFFFFFFFF, /* 0x04: Design Voltage */
+ 0, /* 0x05: Design Capacity of Warning */
+ 0, /* 0x06: Design Capacity of Low */
+ 1, /* 0x07: Capacity Granularity 1 */
+ 1, /* 0x08: Capacity Granularity 2 */
+ "", /* 0x09: Model Number */
+ "100", /* 0x0a: Serial Number */
+ "Lion", /* 0x0b: Battery Type */
+ 0 /* 0x0c: OEM Information */
+ })
+ Name (B0SP, Package (0x04)
+ {
+ 0, /* 0x00: Battery State */
+ 0xFFFFFFFF, /* 0x01: Battery Present Rate */
+ 0xFFFFFFFF, /* 0x02: Battery Remaining Capacity */
+ 0xFFFFFFFF /* 0x03: Battery Present Voltage */
+ })
+ Method (_STA, 0, NotSerialized) // _STA: Status
+ {
+ /* Bitwise AND by vendor is lossy? */
+ Local1 = EB0A
+ If (Local1 & 0x40)
+ {
+ Local1 = 0
+ }
+
+ B0ST = Local1
+ If (Local1)
+ {
+ Return (0x1F)
+ }
+ Else
+ {
+ Return (0x0F)
+ }
+ }
+
+ Method (_BIF, 0, NotSerialized) // _BIF: Battery Information
+ {
+ Local6 = B0ST
+ Local7 = 20
+ While (Local6 && Local7)
+ {
+ If (EB0R)
+ {
+ Local6 = 0
+ }
+ Else
+ {
+ Sleep (500)
+ Local7--
+ }
+ }
+
+ Return (GBIF (0, B0IP, Local6))
+ }
+
+ Method (_BST, 0, NotSerialized) // _BST: Battery Status
+ {
+ Local0 = (DerefOf (B0IP[0]) ^ 1)
+#if CONFIG(EC_USE_LGMR)
+ Local5 = MB0S
+#else
+ Local5 = EB0S
+#endif
+ Return (GBST (0, Local5, Local0, B0SP))
+ }
+}
diff --git a/src/mainboard/acer/aspire_vn7_572g/acpi/brightness_levels.asl b/src/mainboard/acer/aspire_vn7_572g/acpi/brightness_levels.asl
new file mode 100644
index 0000000000..14c5e303d1
--- /dev/null
+++ b/src/mainboard/acer/aspire_vn7_572g/acpi/brightness_levels.asl
@@ -0,0 +1,113 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/intel/gma/acpi/gma.asl>
+
+Scope (GFX0)
+{
+ Name (BRIG, Package (0x67)
+ {
+ 80, /* default AC */
+ 50, /* default battery */
+ 0,
+ 1,
+ 2,
+ 3,
+ 4,
+ 5,
+ 6,
+ 7,
+ 8,
+ 9,
+ 10,
+ 11,
+ 12,
+ 13,
+ 14,
+ 15,
+ 16,
+ 17,
+ 18,
+ 19,
+ 20,
+ 21,
+ 22,
+ 23,
+ 24,
+ 25,
+ 26,
+ 27,
+ 28,
+ 29,
+ 30,
+ 31,
+ 32,
+ 33,
+ 34,
+ 35,
+ 36,
+ 37,
+ 38,
+ 39,
+ 40,
+ 41,
+ 42,
+ 43,
+ 44,
+ 45,
+ 46,
+ 47,
+ 48,
+ 49,
+ 50,
+ 51,
+ 52,
+ 53,
+ 54,
+ 55,
+ 56,
+ 57,
+ 58,
+ 59,
+ 60,
+ 61,
+ 62,
+ 63,
+ 64,
+ 65,
+ 66,
+ 67,
+ 68,
+ 69,
+ 70,
+ 71,
+ 72,
+ 73,
+ 74,
+ 75,
+ 76,
+ 77,
+ 78,
+ 79,
+ 80,
+ 81,
+ 82,
+ 83,
+ 84,
+ 85,
+ 86,
+ 87,
+ 88,
+ 89,
+ 90,
+ 91,
+ 92,
+ 93,
+ 94,
+ 95,
+ 96,
+ 97,
+ 98,
+ 99,
+ 100,
+ })
+}
diff --git a/src/mainboard/acer/aspire_vn7_572g/acpi/ec.asl b/src/mainboard/acer/aspire_vn7_572g/acpi/ec.asl
new file mode 100644
index 0000000000..3a22d389b3
--- /dev/null
+++ b/src/mainboard/acer/aspire_vn7_572g/acpi/ec.asl
@@ -0,0 +1,422 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * Global TODO: (externally: Optimus GC6 and GPS)
+ * - TRPS: This is SMI 0xDD, likely in SmmOemDriver. This SW SMI adds to and executes
+ * a table of function pointers produced throughout the OEM 'value-add' stack.
+ * - Arg0 - "SFUN" - is index into "$FNC" pointer table? It's easier to
+ * correlate *CommonService use: Offset 13 creates TRPS handlers.
+ * - Known functions:
+ * - 0x80 calls offset 0 in ACER_BOOT_DEVICE_SERVICE_PROTOCOL_GUID.
+ * - NB: efiXplorer can miss InstallProtocolInterface() when Interface is local
+ * - 0x81 toggles Intel Dynamic Acceleration in IA32_MISC_ENABLE MSR.
+ * - 0x82 does switch on "OSYS" to set EC byte. Suspect this is for OS features.
+ * (A CVE exists in the vendor code only if it never sets the offset in the buffer.)
+ * - RBEC/WBEC/MBEC: This is SMI 0xDD, "functions" 0x10, 0x11 and 0x12 in SmmKbcDriver,
+ * added into SmmCommonService table at its protocol notify. Performs read, write
+ * and read-modify-write from buffer. We will use ACPI instead.
+ * - WMI: This is likely SMI 0xD0 in A01WMISmmCallback. This SW SMI likely uses the WMI
+ * object and consumes the OEM 'value-add' stack for EC and presumably the A01*
+ * OEM/ODM 'value-add' stack. An SSDT contains the device and EC0 provides "GCMS"
+ * and "GOTS" method helpers.
+ *
+ * Generally, more information is needed.
+ * TODO: Implement more board features: lid and touchpad trigger wake from S3,
+ * Fn-Ctrl swap, sticky Fn keys and always-on USB charger.
+ */
+
+Device (EC0)
+{
+ Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID
+ Name (_GPE, 0x50) // _GPE: General Purpose Events
+ Name (\ECOK, 0)
+#if CONFIG(EC_USE_LGMR)
+ Name (LGMR, 0xFE800000) // Static, may depend on EC configuration. Unsure which register.
+#endif
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ IO (Decode16, 0x62, 0x62, 0, 1)
+ IO (Decode16, 0x66, 0x66, 0, 1)
+ })
+
+ #define EC_SC_IO 0x66
+ #define EC_DATA_IO 0x62
+ #include <ec/acpi/ec.asl>
+
+#if CONFIG(EC_USE_LGMR)
+ OperationRegion (ECMB, SystemMemory, LGMR, 0x200)
+#endif
+ OperationRegion (RAM, EmbeddedControl, 0, 0xFF)
+ Field (RAM, ByteAcc, Lock, Preserve)
+ {
+ CMDB, 8, /* EC commands */
+ ETID, 8, /* Thermal page selector */
+ EBID, 8, /* Battery page selector */
+ Offset (0x06),
+ CMD2, 8, /* param 2: UNUSED */
+ CMD1, 8, /* param 1: UNUSED */
+ CMD0, 8, /* param 0 to EC command */
+ Offset (0x0A),
+ , 1,
+ , 1,
+ Offset (0x10),
+ EQEN, 1, /* EQ enable */
+ ETEE, 1, /* TODO */
+ Offset (0x4E),
+ ISEN, 1, /* TODO */
+ Offset (0x4F),
+ ECTP, 8, /* Touchpad ID */
+ Offset (0x51),
+ , 3,
+ TPEN, 1, /* Touchpad enable */
+ Offset (0x52),
+ WLEX, 1, /* WLAN present */
+ BTEX, 1, /* Bluetooth present */
+ EX3G, 1, /* 3G */
+ , 3,
+ RFEX, 1, /* RF present */
+/*
+ * NOTE: Some reverse engineering, as well as corroborating vendor's hidden SetupUtility
+ * options with the EC's memory space, suggests that offset 0x55 might be the battery
+ * threshold
+ * - TODO: Actually diff changes in modified vendor FW
+ */
+ Offset (0x57),
+ , 7,
+ AHKB, 1, /* Hotkey triggered */
+ AHKE, 8, /* Hotkey data */
+ Offset (0x5C),
+ Offset (0x5D),
+ Offset (0x6C),
+ PWLT, 1, /* NVIDIA GPS: Panel? */
+ , 3,
+ GCON, 1, /* Enter Optimus GC6 */
+ Offset (0x70),
+ , 1,
+ ELID, 1, /* Lid state */
+ , 3,
+ EACS, 1, /* AC state */
+ Offset (0x71),
+ WLEN, 1, /* WLAN enable */
+ BTEN, 1, /* Bluetooth enable */
+ , 3,
+ ISS3, 1,
+ ISS4, 1,
+ ISS5, 1,
+ , 4,
+ EIDW, 1, /* Device wake */
+ Offset (0x74),
+ , 2,
+ , 1,
+ TPEX, 1, /* Touchpad present */
+ Offset (0x75),
+ BLST, 1, /* Bluetooth state */
+ LMIB, 1, /* TODO */
+ Offset (0x76),
+ ECSS, 4, /* EC Notify of power state */
+ EOSS, 4, /* EC Notify of power state */
+ Offset (0x88), /* TODO: Aliased to "EB0S" */
+ EB0A, 1,
+ , 2,
+ EB0R, 1,
+ EB0L, 1,
+ EB0F, 1,
+ EB0N, 1,
+ Offset (0x90),
+ SCPM, 1, /* Set cooling policy */
+ Offset (0x92), /* TODO: Aliased to "ETAF" */
+ ESSF, 1,
+ ECTT, 1,
+ EDTT, 1,
+ EOSD, 1, /* Trip */
+ EVTP, 1,
+ ECP1, 1,
+ , 1,
+ ECP2, 1,
+ Offset (0xA8),
+ ES0T, 8, /* Temperature */
+ ES1T, 8, /* Temperature */
+ Offset (0xD0),
+ ESP0, 8, /* Passive temp */
+ ESC0, 8, /* Critical temp */
+ ESP1, 8, /* Passive temp */
+ ESC1, 8, /* Critical temp */
+ }
+ /* Aliases several battery registers */
+ Field (RAM, ByteAcc, Lock, Preserve)
+ {
+ Offset (0x88),
+ EB0S, 8, /* Battery 0 state */
+ }
+ /* Aliases several thermal registers */
+ Field (RAM, ByteAcc, Lock, Preserve)
+ {
+ Offset (0x92),
+ ETAF, 8,
+ }
+
+#if CONFIG(EC_USE_LGMR)
+ Field (ECMB, ByteAcc, Lock, Preserve)
+ {
+ Offset (0x02),
+ , 1,
+ MLID, 1,
+ , 3,
+ MACS, 1,
+ Offset (0x06),
+ MBTP, 8,
+ Offset (0x08),
+ MB0S, 8,
+ Offset (0x20),
+ MS0T, 8,
+ MS1T, 8,
+ MS2T, 8,
+ MS3T, 8,
+ MS4T, 8,
+ MS5T, 8,
+ Offset (0x53),
+ MCSS, 1,
+ MCTT, 1,
+ MDTT, 1,
+ MOSD, 1,
+ MVTP, 1,
+ Offset (0x54),
+ MSP0, 8,
+ MSC0, 8,
+ MCC0, 8,
+ MSC1, 8,
+ }
+#endif
+
+ Method (_REG, 2, NotSerialized) // _REG: Region Availability
+ {
+ If (Arg0 == 3)
+ {
+ ECOK = Arg1 // OS can clear region availability
+ If (Arg1 == 1) // On initialise
+ {
+ TINI ()
+ EOSS = 0x05
+ /* OSYS retrieved by SMM, Arg3 is unused */
+// TRPS (0x82, 1, 0)
+
+ /*
+ * Other pages return valid data too, but this seems to be
+ * the page we are expecting - persistently in ectool dump
+ * with vendor firmware
+ * FIXME: Contents of other pages?
+ */
+ ETID = 0x20
+ }
+ }
+
+ /* iGFX RC method call stripped */
+ }
+
+ Method (TINI, 0, NotSerialized)
+ {
+ If (ECOK)
+ {
+ ETAF = 0
+ ETEE = 1
+ }
+ Else
+ {
+ EC_WRITE (0x92, 0) // ETAF = 0
+ MBEC (0x10, 0xFD, 0x02) // ETEE = 1
+ }
+ }
+
+ Name (RFST, 0) /* RF state */
+ Method (ECPS, 1, NotSerialized) // _PTS: Prepare To Sleep
+ {
+ ECSS = Arg0
+ /* OSYS retrieved by SMM */
+// TRPS (0x82, 0x02, Arg0)
+ If ((Arg0 == 3) || (Arg0 == 4))
+ {
+ RFST = RFEX
+ }
+ }
+
+ Method (ECWK, 1, NotSerialized) // _WAK: Wake
+ {
+ EQEN = 1
+ EOSS = Arg0
+ TINI ()
+ Notify (BAT0, 0x81) // Information Change
+ /* OSYS retrieved by SMM */
+// TRPS (0x82, 0x03, Arg0)
+ If ((Arg0 == 3) || (Arg0 == 4))
+ {
+ RFEX = RFST
+ Notify (SLPB, 0x02) // Device Wake
+ }
+ /* iGFX RC method call stripped */
+ }
+
+ Method (MBEC, 3, Serialized)
+ {
+ Local0 = EC_READ (Arg0)
+ Local0 &= Arg1
+ Local0 |= Arg2
+ EC_WRITE (Arg0, Local0)
+ }
+
+ /* Graphical hotkey */
+ Method (_Q19, 0, NotSerialized)
+ {
+ Debug = "Graphical hotkey display switching not implemented in coreboot!"
+ }
+
+ /* Increase brightness */
+ Method (_Q1C, 0, NotSerialized)
+ {
+ ^^^GFX0.INCB ()
+ }
+
+ /* Decrease brightness */
+ Method (_Q1D, 0, NotSerialized)
+ {
+ ^^^GFX0.DECB ()
+ }
+
+ /* Hotkeys */
+ Method (_Q2C, 0, NotSerialized)
+ {
+ If (LMIB)
+ {
+ If (!AHKB) /* Else, WMI clears its buffer? */
+ {
+ Local1 = AHKE
+ If ((Local1 > 0) && (Local1 < 0x80))
+ {
+ Debug = "Hotkeys - TODO: Airplane mode?"
+ /* WMI -> "GCMS" method */
+ }
+ ElseIf ((Local1 > 0x80) && (Local1 < 0xA0))
+ {
+ /* TODO: Not working when called by HID mode. What does WMI do here? */
+ TPEN ^= 1
+ }
+ }
+ }
+ }
+
+ Method (_Q36, 0, NotSerialized)
+ {
+ If (ECOK)
+ {
+ EOSD = 1 // Thermal trip
+ }
+ Else
+ {
+ MBEC (0x92, 0xF7, 0x08) // EOSD = 1
+ }
+
+ Sleep (500)
+ Notify (\_TZ.TZ01, 0x80) // Thermal Status Change
+ Notify (\_TZ.TZ00, 0x80) // Thermal Status Change
+ }
+
+ Method (_Q3F, 0, NotSerialized)
+ {
+ /* Arg3 is unused */
+// TRPS (0x80, 0, 0)
+ }
+
+ Method (_Q40, 0, NotSerialized)
+ {
+ Notify (BAT0, 0x81) // Information Change
+ }
+
+ Method (_Q41, 0, NotSerialized)
+ {
+ Notify (BAT0, 0x81) // Information Change
+ }
+
+ /* Battery status change */
+ Method (_Q48, 0, NotSerialized)
+ {
+ Notify (BAT0, 0x80)
+ }
+
+ /* Battery critical? */
+ Method (_Q4C, 0, NotSerialized)
+ {
+ If (B0ST)
+ {
+ Notify (BAT0, 0x80) // Status Change
+ }
+ }
+
+ /* AC status change: present */
+ Method (_Q50, 0, NotSerialized)
+ {
+ Notify (ADP1, 0x80)
+ }
+
+ /* AC status change: not present */
+ Method (_Q51, 0, NotSerialized)
+ {
+ Notify (ADP1, 0x80)
+ }
+
+ /* Lid status change: open */
+ Method (_Q52, 0, NotSerialized)
+ {
+ Notify (LID0, 0x80)
+ }
+
+ /* Lid status change: close */
+ Method (_Q53, 0, NotSerialized)
+ {
+ Notify (LID0, 0x80)
+ }
+
+ Method (_Q60, 0, NotSerialized)
+ {
+ Debug = "EC Query (0x60): WMI"
+ }
+
+ Method (_Q61, 0, NotSerialized)
+ {
+ Debug = "EC Query (0x61): WMI"
+ }
+
+ Method (_Q62, 0, NotSerialized)
+ {
+ Debug = "EC Query (0x62): Optimus GC6 or NVIDIA GPS"
+ }
+
+ Method (_Q63, 0, NotSerialized)
+ {
+ Debug = "EC Query (0x63): Optimus GC6 or NVIDIA GPS"
+ }
+
+ Method (_Q67, 0, NotSerialized)
+ {
+ Debug = "EC Query (0x67): NVIDIA GPS"
+ }
+
+ Method (_Q68, 0, NotSerialized)
+ {
+ Debug = "EC Query (0x68): NVIDIA GPS"
+ }
+
+ Method (_Q6C, 0, NotSerialized)
+ {
+ /* Arg3 is unused */
+// TRPS (0x81, 0, 0)
+ }
+
+ Method (_Q6D, 0, NotSerialized)
+ {
+ /* Arg3 is unused */
+// TRPS (0x81, 1, 0)
+ }
+
+ #include "ac.asl"
+ #include "battery.asl"
+}
diff --git a/src/mainboard/acer/aspire_vn7_572g/acpi/mainboard.asl b/src/mainboard/acer/aspire_vn7_572g/acpi/mainboard.asl
new file mode 100644
index 0000000000..a3c48b290d
--- /dev/null
+++ b/src/mainboard/acer/aspire_vn7_572g/acpi/mainboard.asl
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+// TODO: Does board actually support DPTF?
+#include "thermal.asl"
+
+Scope (_SB)
+{
+ Method (MPTS, 1, NotSerialized) // _PTS: Prepare To Sleep
+ {
+ ^PCI0.LPCB.EC0.ECPS (Arg0)
+ /* TBT and DTS not supported, TPM.PTS can be called elsewhere */
+ }
+
+ Method (MWAK, 1, Serialized) // _WAK: Wake
+ {
+ ^PCI0.LPCB.EC0.ECWK (Arg0)
+ /* No GPIO expander, 8254 clock-gating and PCIe PME can be performed elsewhere */
+
+ If ((Arg0 == 3) || (Arg0 == 4))
+ {
+ /* DTS and TBT not supported, iGFX RC variable update stripped */
+ LIDS = ^LID0._LID ()
+ Notify (LID0, 0x80) // Status Change
+ /* TODO: Bus checks? Based on KabylakeOpenBoardPkg - Platform.asl
+ perhaps not (Warm insertion/removal not possible on mobile */
+ }
+ }
+
+ Method (MS0X, 1, Serialized) // S0ix hook. Porting "GUAM" method - "Global User Absent Mode"
+ {
+ If (Arg0 == 0)
+ {
+ /* Exit "Connected Standby" */
+#if 1 // EC Notification
+ ^PCI0.LPCB.EC0.EOSS = 0
+#endif
+ /* TODO: P-state capping, PL setting? */
+ }
+ ElseIf (Arg0 == 1)
+ {
+ /* Enter "Connected Standby" */
+#if 1 // EC Notification
+ ^PCI0.LPCB.EC0.ECSS = 0x08
+#endif
+ /* TODO: P-state capping, PL setting? */
+ }
+ }
+
+ Device (LID0)
+ {
+ Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID
+ Method (_LID, 0, NotSerialized) // _LID: Lid Status
+ {
+#if CONFIG(EC_USE_LGMR)
+ Return (^^PCI0.LPCB.EC0.MLID)
+#else
+ Return (^^PCI0.LPCB.EC0.ELID)
+#endif
+ }
+
+ Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
+ {
+ ^^PCI0.LPCB.EC0.EIDW = Arg0
+ }
+
+ Name (_PRW, Package () { 0x0A, 3 }) // _PRW: Power Resources for Wake
+ }
+
+ Device (SLPB)
+ {
+ Name (_HID, EisaId ("PNP0C0E") /* Sleep Button Device */) // _HID: Hardware ID
+ Name (_PRW, Package () { 0x0A, 3 }) // _PRW: Power Resources for Wake
+ }
+}
+
+Scope (_GPE)
+{
+ /* TODO - Remaining Level-Triggered GPEs: PCH GPE, PCIe PME, TBT, DTS, GFX SCI and tier-2 (RTD3) */
+ Method (_L0A, 0, NotSerialized)
+ {
+ Notify (\_SB.SLPB, 0x02) // Device Wake
+ }
+}
diff --git a/src/mainboard/acer/aspire_vn7_572g/acpi/superio.asl b/src/mainboard/acer/aspire_vn7_572g/acpi/superio.asl
new file mode 100644
index 0000000000..55b1db5b11
--- /dev/null
+++ b/src/mainboard/acer/aspire_vn7_572g/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/pc80/pc/ps2_controller.asl>
diff --git a/src/mainboard/acer/aspire_vn7_572g/acpi/thermal.asl b/src/mainboard/acer/aspire_vn7_572g/acpi/thermal.asl
new file mode 100644
index 0000000000..7d175a23e5
--- /dev/null
+++ b/src/mainboard/acer/aspire_vn7_572g/acpi/thermal.asl
@@ -0,0 +1,121 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+Scope (_TZ)
+{
+ Name (CRT0, 0)
+ Name (PSV0, 0)
+ ThermalZone (TZ01)
+ {
+ Method (_TMP, 0, Serialized) // _TMP: Temperature
+ {
+#if CONFIG(EC_USE_LGMR)
+ Local0 = \_SB.PCI0.LPCB.EC0.MS0T
+ Local1 = \_SB.PCI0.LPCB.EC0.MCSS
+ /* Suppress warning over reading status flag by dummy OR */
+ Or (Local1, 1, Local1)
+ Local2 = \_SB.PCI0.LPCB.EC0.MOSD
+#else
+ Local0 = \_SB.PCI0.LPCB.EC0.ES0T
+ /* "MCSS": Considering neighbouring bits, likely
+ "ESSF" in thermals, not "ECSS" in power notifications */
+ Local1 = \_SB.PCI0.LPCB.EC0.ESSF
+ Or (Local1, 1, Local1)
+ Local2 = \_SB.PCI0.LPCB.EC0.EOSD
+#endif
+ If (Local2) // Thermal trip
+ {
+ If (Local0 <= CRT0)
+ {
+ Local0 = (CRT0 + 2)
+ }
+ }
+
+ Return (C2K (Local0))
+ }
+
+ Method (_CRT, 0, Serialized) // _CRT: Critical Temperature
+ {
+#if CONFIG(EC_USE_LGMR)
+ Local0 = \_SB.PCI0.LPCB.EC0.MSC0
+#else
+ Local0 = \_SB.PCI0.LPCB.EC0.ESC0
+#endif
+ If ((Local0 >= 128) || (Local0 < 30))
+ {
+ Local0 = 120
+ }
+
+ CRT0 = Local0
+ Return (C2K (Local0))
+ }
+
+ Method (_SCP, 1, Serialized) // _SCP: Set Cooling Policy
+ {
+ If (ECOK)
+ {
+ \_SB.PCI0.LPCB.EC0.SCPM = Arg0
+ }
+ Else
+ {
+ /* MBEC: Called SMI function 0x12 */
+ \_SB.PCI0.LPCB.EC0.MBEC (0x90, 0xFE, Arg0) // SCPM = Arg0
+ }
+ }
+
+ Method (_PSV, 0, Serialized) // _PSV: Passive Temperature
+ {
+#if CONFIG(EC_USE_LGMR)
+ Local0 = \_SB.PCI0.LPCB.EC0.MSP0
+#else
+ Local0 = \_SB.PCI0.LPCB.EC0.ESP0
+#endif
+ If ((Local0 >= 128) || (Local0 < 30))
+ {
+ Local0 = 30
+ }
+
+ PSV0 = Local0
+ Return (C2K (Local0))
+ }
+ }
+
+ ThermalZone (TZ00)
+ {
+ Method (_TMP, 0, Serialized) // _TMP: Temperature
+ {
+#if CONFIG(EC_USE_LGMR)
+ Local0 = \_SB.PCI0.LPCB.EC0.MS1T
+#else
+ Local0 = \_SB.PCI0.LPCB.EC0.ES1T
+#endif
+
+ Return (C2K (Local0))
+ }
+
+ Method (_CRT, 0, Serialized) // _CRT: Critical Temperature
+ {
+#if CONFIG(EC_USE_LGMR)
+ Local0 = \_SB.PCI0.LPCB.EC0.MSC1
+#else
+ Local0 = \_SB.PCI0.LPCB.EC0.ESC1
+#endif
+ If ((Local0 >= 128) || (Local0 < 30))
+ {
+ Local0 = 120
+ }
+
+ Return (C2K (Local0))
+ }
+ }
+
+ Method (C2K, 1, NotSerialized)
+ {
+ Local0 = Arg0
+ If ((Local0 >= 127) || (Local0 <= 16))
+ {
+ Local0 = 30
+ }
+
+ Return ((Local0 * 10) + 2732) // Celsius to centi-Kelvin
+ }
+}