This patch unifies the use of config options in v2 to all start with CONFIG_

It's basically done with the following script and some manual fixup:

VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
	find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

4 files changed, 77 insertions, 77 deletions

diff --git a/src/mainboard/abit/be6-ii_v2_0/Config.lb b/src/mainboard/abit/be6-ii_v2_0/Config.lb
index 97c403ce81..d8c1ce3f94 100644
--- a/src/mainboard/abit/be6-ii_v2_0/Config.lb
+++ b/src/mainboard/abit/be6-ii_v2_0/Config.lb
@@ -18,38 +18,38 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-## XIP_ROM_SIZE must be a power of 2.
-default XIP_ROM_SIZE = 64 * 1024
+## CONFIG_XIP_ROM_SIZE must be a power of 2.
+default CONFIG_XIP_ROM_SIZE = 64 * 1024
 include /config/nofailovercalculation.lb
 
 arch i386 end
 driver mainboard.o
-if HAVE_PIRQ_TABLE
+if CONFIG_HAVE_PIRQ_TABLE
 	object irq_tables.o
 end
 makerule ./failover.E
-	depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
-	action "../romcc -E -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
+	depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
+	action "../romcc -E -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
 end
 makerule ./failover.inc
-	depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
-	action "../romcc -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
+	depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
+	action "../romcc -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
 end
 makerule ./auto.E
-	# depends	"$(MAINBOARD)/auto.c option_table.h ../romcc"
-	depends	"$(MAINBOARD)/auto.c ../romcc"
-	action	"../romcc -E -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+	# depends	"$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
+	depends	"$(CONFIG_MAINBOARD)/auto.c ../romcc"
+	action	"../romcc -E -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
 end
 makerule ./auto.inc
-	# depends "$(MAINBOARD)/auto.c option_table.h ../romcc"
-	depends "$(MAINBOARD)/auto.c ../romcc"
-	action	"../romcc -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+	# depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
+	depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
+	action	"../romcc -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
 end
 mainboardinit cpu/x86/16bit/entry16.inc
 mainboardinit cpu/x86/32bit/entry32.inc
 ldscript /cpu/x86/16bit/entry16.lds
 ldscript /cpu/x86/32bit/entry32.lds
-if USE_FALLBACK_IMAGE
+if CONFIG_USE_FALLBACK_IMAGE
 	mainboardinit cpu/x86/16bit/reset16.inc
 	ldscript /cpu/x86/16bit/reset16.lds
 else
@@ -59,7 +59,7 @@ end
 mainboardinit arch/i386/lib/cpu_reset.inc
 mainboardinit arch/i386/lib/id.inc
 ldscript /arch/i386/lib/id.lds
-if USE_FALLBACK_IMAGE
+if CONFIG_USE_FALLBACK_IMAGE
 	ldscript /arch/i386/lib/failover.lds
 	mainboardinit ./failover.inc
 end
diff --git a/src/mainboard/abit/be6-ii_v2_0/Options.lb b/src/mainboard/abit/be6-ii_v2_0/Options.lb
index 986b770bbc..55255c120e 100644
--- a/src/mainboard/abit/be6-ii_v2_0/Options.lb
+++ b/src/mainboard/abit/be6-ii_v2_0/Options.lb
@@ -18,83 +18,83 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-uses HAVE_MP_TABLE
+uses CONFIG_HAVE_MP_TABLE
 uses CONFIG_CBFS
-uses HAVE_PIRQ_TABLE
-uses USE_FALLBACK_IMAGE
-uses HAVE_FALLBACK_BOOT
-uses HAVE_HARD_RESET
-uses HAVE_OPTION_TABLE
-uses USE_OPTION_TABLE
+uses CONFIG_HAVE_PIRQ_TABLE
+uses CONFIG_USE_FALLBACK_IMAGE
+uses CONFIG_HAVE_FALLBACK_BOOT
+uses CONFIG_HAVE_HARD_RESET
+uses CONFIG_HAVE_OPTION_TABLE
+uses CONFIG_USE_OPTION_TABLE
 uses CONFIG_ROM_PAYLOAD
-uses IRQ_SLOT_COUNT
-uses MAINBOARD
-uses MAINBOARD_VENDOR
-uses MAINBOARD_PART_NUMBER
+uses CONFIG_IRQ_SLOT_COUNT
+uses CONFIG_MAINBOARD
+uses CONFIG_MAINBOARD_VENDOR
+uses CONFIG_MAINBOARD_PART_NUMBER
 uses COREBOOT_EXTRA_VERSION
-uses ARCH
-uses FALLBACK_SIZE
-uses STACK_SIZE
-uses HEAP_SIZE
-uses ROM_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_IMAGE_SIZE
-uses ROM_SECTION_SIZE
-uses ROM_SECTION_OFFSET
+uses CONFIG_ARCH
+uses CONFIG_FALLBACK_SIZE
+uses CONFIG_STACK_SIZE
+uses CONFIG_HEAP_SIZE
+uses CONFIG_ROM_SIZE
+uses CONFIG_ROM_SECTION_SIZE
+uses CONFIG_ROM_IMAGE_SIZE
+uses CONFIG_ROM_SECTION_SIZE
+uses CONFIG_ROM_SECTION_OFFSET
 uses CONFIG_ROM_PAYLOAD_START
 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
 uses CONFIG_PRECOMPRESSED_PAYLOAD
-uses PAYLOAD_SIZE
-uses _ROMBASE
-uses _RAMBASE
-uses XIP_ROM_SIZE
-uses XIP_ROM_BASE
-uses HAVE_MP_TABLE
-uses CROSS_COMPILE
+uses CONFIG_PAYLOAD_SIZE
+uses CONFIG_ROMBASE
+uses CONFIG_RAMBASE
+uses CONFIG_XIP_ROM_SIZE
+uses CONFIG_XIP_ROM_BASE
+uses CONFIG_HAVE_MP_TABLE
+uses CONFIG_CROSS_COMPILE
 uses CC
-uses HOSTCC
-uses OBJCOPY
-uses DEFAULT_CONSOLE_LOGLEVEL
-uses MAXIMUM_CONSOLE_LOGLEVEL
+uses CONFIG_HOSTCC
+uses CONFIG_OBJCOPY
+uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
+uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
 uses CONFIG_CONSOLE_SERIAL8250
-uses TTYS0_BAUD
-uses TTYS0_BASE
-uses TTYS0_LCS
+uses CONFIG_TTYS0_BAUD
+uses CONFIG_TTYS0_BASE
+uses CONFIG_TTYS0_LCS
 uses CONFIG_UDELAY_TSC
 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
-uses MAINBOARD_VENDOR
-uses MAINBOARD_PART_NUMBER
+uses CONFIG_MAINBOARD_VENDOR
+uses CONFIG_MAINBOARD_PART_NUMBER
 uses CONFIG_CONSOLE_VGA
 uses CONFIG_PCI_ROM_RUN
 
-default ROM_SIZE = 256 * 1024		# Override this in targets/*/Config.lb.
-default HAVE_FALLBACK_BOOT = 1
-default HAVE_MP_TABLE = 0
-default HAVE_HARD_RESET = 0
+default CONFIG_ROM_SIZE = 256 * 1024		# Override this in targets/*/Config.lb.
+default CONFIG_HAVE_FALLBACK_BOOT = 1
+default CONFIG_HAVE_MP_TABLE = 0
+default CONFIG_HAVE_HARD_RESET = 0
 default CONFIG_UDELAY_TSC = 1
 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
-default HAVE_PIRQ_TABLE = 1
-default IRQ_SLOT_COUNT = 0		# Override this in targets/*/Config.lb.
-default MAINBOARD_VENDOR = "N/A"	# Override this in targets/*/Config.lb.
-default MAINBOARD_PART_NUMBER = "N/A"	# Override this in targets/*/Config.lb.
-default ROM_IMAGE_SIZE = 64 * 1024
-default FALLBACK_SIZE = 128 * 1024
-default STACK_SIZE = 8 * 1024
-default HEAP_SIZE = 16 * 1024
-default HAVE_OPTION_TABLE = 0
-#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
-default USE_OPTION_TABLE = 0
-default _RAMBASE = 0x00004000
+default CONFIG_HAVE_PIRQ_TABLE = 1
+default CONFIG_IRQ_SLOT_COUNT = 0		# Override this in targets/*/Config.lb.
+default CONFIG_MAINBOARD_VENDOR = "N/A"	# Override this in targets/*/Config.lb.
+default CONFIG_MAINBOARD_PART_NUMBER = "N/A"	# Override this in targets/*/Config.lb.
+default CONFIG_ROM_IMAGE_SIZE = 64 * 1024
+default CONFIG_FALLBACK_SIZE = 128 * 1024
+default CONFIG_STACK_SIZE = 8 * 1024
+default CONFIG_HEAP_SIZE = 16 * 1024
+default CONFIG_HAVE_OPTION_TABLE = 0
+#default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
+default CONFIG_USE_OPTION_TABLE = 0
+default CONFIG_RAMBASE = 0x00004000
 default CONFIG_ROM_PAYLOAD = 1
-default CROSS_COMPILE = ""
-default CC = "$(CROSS_COMPILE)gcc -m32"
-default HOSTCC = "gcc"
+default CONFIG_CROSS_COMPILE = ""
+default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32"
+default CONFIG_HOSTCC = "gcc"
 default CONFIG_CONSOLE_SERIAL8250 = 1
-default TTYS0_BAUD = 115200
-default TTYS0_BASE = 0x3f8
-default TTYS0_LCS = 0x3			# 8n1
-default DEFAULT_CONSOLE_LOGLEVEL = 9	# Override this in targets/*/Config.lb.
-default MAXIMUM_CONSOLE_LOGLEVEL = 9	# Override this in targets/*/Config.lb.
+default CONFIG_TTYS0_BAUD = 115200
+default CONFIG_TTYS0_BASE = 0x3f8
+default CONFIG_TTYS0_LCS = 0x3			# 8n1
+default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9	# Override this in targets/*/Config.lb.
+default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9	# Override this in targets/*/Config.lb.
 default CONFIG_CONSOLE_VGA = 1		# Override this in targets/*/Config.lb.
 default CONFIG_PCI_ROM_RUN = 1		# Override this in targets/*/Config.lb.
 
diff --git a/src/mainboard/abit/be6-ii_v2_0/auto.c b/src/mainboard/abit/be6-ii_v2_0/auto.c
index dd43c07a84..fe9bce8423 100644
--- a/src/mainboard/abit/be6-ii_v2_0/auto.c
+++ b/src/mainboard/abit/be6-ii_v2_0/auto.c
@@ -57,7 +57,7 @@ static void main(unsigned long bist)
 		early_mtrr_init();
 
 	/* FIXME: It's a Winbond W83977EF, actually. */
-	w83977tf_enable_serial(SERIAL_DEV, TTYS0_BASE);
+	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	uart_init();
 	console_init();
 	report_bist_failure(bist);
diff --git a/src/mainboard/abit/be6-ii_v2_0/irq_tables.c b/src/mainboard/abit/be6-ii_v2_0/irq_tables.c
index 88aaf9c885..c33e0331f7 100644
--- a/src/mainboard/abit/be6-ii_v2_0/irq_tables.c
+++ b/src/mainboard/abit/be6-ii_v2_0/irq_tables.c
@@ -23,7 +23,7 @@
 const struct irq_routing_table intel_irq_routing_table = {
 	PIRQ_SIGNATURE,
 	PIRQ_VERSION,
-	32 + 16 * IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
+	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
 	0x00,			/* Interrupt router bus */
 	(0x07 << 3) | 0x0,	/* Interrupt router device */
 	0x1c20,			/* IRQs devoted exclusively to PCI usage */