diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-06-23 20:32:15 +0200 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2024-06-26 11:44:13 +0000 |
| commit | 4b7220398923af42fa39a7fcb532daf797510f77 (patch) | |
| tree | f338082fc94ba81015f56348d48fe159fc238201 /src/mainboard/51nb/x210 | |
| parent | df7de392ef5f8e1654df96a1a050820eb3779012 (diff) | |
skl mainboards/dt: Move serirq setting into LPC device scope
Change-Id: I84da5365907664ce223dec4adb22a8f1a6e2a144
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83188
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/51nb/x210')
| -rw-r--r-- | src/mainboard/51nb/x210/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index 1f2fa40dee..3ffc00fa2e 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -39,8 +39,6 @@ chip soc/intel/skylake register "PmConfigSlpSusMinAssert" = "3" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s - register "serirq_mode" = "SERIRQ_CONTINUOUS" - # Enable Root Ports 3, 4 and 9 register "PcieRpEnable[2]" = "1" # Ethernet controller register "PcieRpClkReqSupport[2]" = "1" @@ -116,6 +114,8 @@ chip soc/intel/skylake device ref pcie_rp4 on end device ref pcie_rp9 on end device ref lpc_espi on + register "serirq_mode" = "SERIRQ_CONTINUOUS" + register "gen1_dec" = "0x000c0681" register "gen2_dec" = "0x000c1641" |