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| author | Raul E Rangel <rrangel@chromium.org> | 2021-03-16 20:29:06 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-05-09 18:10:29 +0000 |
| commit | f486fcc9985f57c87e2a44a0cc7f1fdc8af32740 (patch) | |
| tree | b9e046e1ac0cfd03002e8291211e81db61c5a102 /src/lib | |
| parent | fd7ed87746d763feff7d26dba9598b505e8750c1 (diff) | |
soc/amd/cezanne: Generate PCI routing table
Use the new acpigen_write_PRT to write the _PRT for each PCI bridge.
BUG=b:184766519
TEST=Dump guybrush ACPI table and verify it looks correct.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Idb559335435a95e73640e6d7fb224e16e0592326
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/lib')
0 files changed, 0 insertions, 0 deletions