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authorBora Guvendik <bora.guvendik@intel.com>2018-03-30 16:03:32 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-05-23 09:04:41 +0000
commitddf2bc5081e0eafc33af40a06f4217c5c851fa3f (patch)
tree3a0dec85d5c60ada99c08fdbce00cb7dd2634572 /src/lib
parentb7fe7a1a8e033706f39c0fded5901f0f1dce7cfb (diff)
coreboot_tables: pass the early_mmc_wake_hw status to payload
Pass the return value from early_mmc_wake_hw() to the payload so that payload can skip sending CMD0 and resetting the card in case of success or in case of a failure in firmware, payload can recover by sending CMD0 and resetting the card. BUG=b:78106689 TEST=Boot to OS Change-Id: Ia4c57d05433c3966118c3642913d7017958cce55 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/25464 Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/coreboot_table.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 6e44f5d3d5..14cd030202 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -321,6 +321,22 @@ static void lb_sku_id(struct lb_header *header)
printk(BIOS_INFO, "SKU ID: %d\n", sid);
}
+static void lb_mmc_info(struct lb_header *header)
+{
+ struct lb_mmc_info *rec;
+ int32_t *ms_cbmem;
+
+ ms_cbmem = cbmem_find(CBMEM_ID_MMC_STATUS);
+ if (!ms_cbmem)
+ return;
+
+ rec = (struct lb_mmc_info *)lb_new_record(header);
+
+ rec->tag = LB_TAG_MMC_INFO;
+ rec->size = sizeof(*rec);
+ rec->early_cmd1_status = *ms_cbmem;
+}
+
static void add_cbmem_pointers(struct lb_header *header)
{
/*
@@ -559,6 +575,9 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
lb_ram_code(head);
lb_sku_id(head);
+ /* Pass mmc early init status */
+ lb_mmc_info(head);
+
/* Add SPI flash description if available */
if (CONFIG(BOOT_DEVICE_SPI_FLASH))
lb_spi_flash(head);