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authorDavid Hendricks <dhendrix@chromium.org>2014-11-03 17:42:09 -0800
committerAaron Durbin <adurbin@chromium.org>2015-04-10 16:47:44 +0200
commit627b3bd2b09e4daf40001f2a7833df3ef2a257b2 (patch)
tree1ab02371b56f7cdf7477cfcc6c61ae602fff5531 /src/lib
parentceaabc94efec339f75732dd7bf72c51f8dc52941 (diff)
cbtables: Add RAM config information
This adds the RAM config code to the coreboot tables. The purpose is to expose this information to software running at higher levels, e.g. to print the RAM config coreboot is using as part of factory tests. The prototype for ram_code() is in boardid.h since they are closely related and will likely have common code. BUG=chrome-os-partner:31728 BRANCH=none TEST=tested w/ follow-up CLs on pinky Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: Idd38ec5b6af16e87dfff2e3750c18fdaea604400 Original-Reviewed-on: https://chromium-review.googlesource.com/227248 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> (cherry picked from commit 77dd5fb9347b53bb8a64ad22341257fb3be0c106) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Ibe7044cafe0a61214ac2d7fea5f7255b2c11829b Reviewed-on: http://review.coreboot.org/9438 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/coreboot_table.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 365283fffe..332bed172a 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -227,6 +227,19 @@ static void lb_board_id(struct lb_header *header)
#endif
}
+static void lb_ram_code(struct lb_header *header)
+{
+#if IS_ENABLED(CONFIG_RAM_CODE_SUPPORT)
+ struct lb_ram_code *code;
+
+ code = (struct lb_ram_code *)lb_new_record(header);
+
+ code->tag = LB_TAG_RAM_CODE;
+ code->size = sizeof(*code);
+ code->ram_code = ram_code();
+#endif
+}
+
static void add_cbmem_pointers(struct lb_header *header)
{
/*
@@ -452,6 +465,9 @@ unsigned long write_coreboot_table(
/* Add board ID if available */
lb_board_id(head);
+ /* Add RAM config if available */
+ lb_ram_code(head);
+
add_cbmem_pointers(head);
/* Add board-specific table entries, if any. */