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| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-21 15:29:17 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-05-26 11:47:02 +0000 |
| commit | 64829161111ea833453df8479d1bada1f91ee511 (patch) | |
| tree | f8bcb5788414ffc39f748fbb8bbef4ca3aa4a968 /src/lib/timestamp.c | |
| parent | 7ee8e7f12969f3141fd0b1c814c3b648268156b8 (diff) | |
AGESA f16kb: Factor out default MTRR settings
All AGESA f16kb boards use the same MTRR values. Factor them out,
while still allowing a board to override them via BLDCFG.
TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.
Change-Id: I236e9d45505e92027acc3ba5ff496f5e2f09b9f3
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41665
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Diffstat (limited to 'src/lib/timestamp.c')
0 files changed, 0 insertions, 0 deletions