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authorLijian Zhao <lijian.zhao@intel.com>2018-12-06 17:29:55 -0800
committerPatrick Georgi <pgeorgi@google.com>2018-12-19 05:32:34 +0000
commit3ef74493928fafa2955e3b0acecb2b625f223d83 (patch)
tree81bce5493c4e66ba65f67f3eec6da64684d799f9 /src/lib/timer_queue.c
parent6b2c9b17514d10f61106c50580ea6c0f33345e00 (diff)
soc/intel/cannonlake: Auto turn on HDA controller
Update HDAenable bit in Fsp memory init UPD data base on devicetree settings. BUG=N/A TEST=N/A Change-Id: I5159c00a855a2a9516714ccee8ee9933465c5063 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/30097 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/lib/timer_queue.c')
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