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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2020-03-12 01:15:43 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-03-15 12:55:19 +0000
commita6bff2d8ab4824a95221fda8a3b175c3f4337720 (patch)
treebc535f3c4854497abb9cdcc33afb8a720e8b2ef1 /src/lib/ramdetect.c
parent4b9fa2d6ea6107cf0c94b116dfffa553075fcded (diff)
soc/intel/tigerlake: Enable CNVi through dev_enabled
Check for dev enabled status for CNVi and update the UPD accordingly. BUG=none BRANCH=none TEST=Build and boot tglrvp Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: I15a03cc70f12e094badf942dd81f22bd09531051 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39465 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/lib/ramdetect.c')
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