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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-06-12 20:08:29 -0500
committerNico Huber <nico.h@gmx.de>2015-10-24 01:44:43 +0200
commit5a0efd255da0dbba2e6ff4b8ad9ca9bad8370857 (patch)
tree07d2ecdb3bdca3498d4d2b0de45a40ab7afaa4b3 /src/lib/memcpy.c
parenta693f524ca7d2c3a199f32087717ec8c3f79214a (diff)
southbridge/amd/sr5650: Add optional delay after link training
Certain devices (such as the LSI SAS 2008 controller) do not respond to PCI probes immediately after link training. If it is known that such a device is likely to be installed allow the mainboard to insert an appropriate delay. Change-Id: Ibcd9426628cacd6f88e6e3fcbc2b3eb7e3a92081 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11991 Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Tested-by: build bot (Jenkins)
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